9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "code/compiledIC.hpp"
30 #include "compiler/compileTask.hpp"
31 #include "compiler/disassembler.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/cardTable.hpp"
37 #include "gc/shared/collectedHeap.hpp"
38 #include "gc/shared/tlab_globals.hpp"
39 #include "interpreter/bytecodeHistogram.hpp"
40 #include "interpreter/interpreter.hpp"
41 #include "interpreter/interpreterRuntime.hpp"
42 #include "jvm.h"
43 #include "memory/resourceArea.hpp"
44 #include "memory/universe.hpp"
45 #include "nativeInst_aarch64.hpp"
46 #include "oops/accessDecorators.hpp"
47 #include "oops/compressedKlass.inline.hpp"
48 #include "oops/compressedOops.inline.hpp"
49 #include "oops/klass.inline.hpp"
50 #include "runtime/continuation.hpp"
51 #include "runtime/icache.hpp"
52 #include "runtime/interfaceSupport.inline.hpp"
53 #include "runtime/javaThread.hpp"
54 #include "runtime/jniHandles.inline.hpp"
55 #include "runtime/sharedRuntime.hpp"
56 #include "runtime/stubRoutines.hpp"
57 #include "utilities/globalDefinitions.hpp"
58 #include "utilities/powerOfTwo.hpp"
59 #ifdef COMPILER1
60 #include "c1/c1_LIRAssembler.hpp"
61 #endif
62 #ifdef COMPILER2
63 #include "oops/oop.hpp"
64 #include "opto/compile.hpp"
65 #include "opto/node.hpp"
66 #include "opto/output.hpp"
67 #endif
68
69 #include <sys/types.h>
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) block_comment(str)
75 #endif
76 #define STOP(str) stop(str);
77 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
78
2043 ldarb(scratch, scratch);
2044 subs(zr, scratch, InstanceKlass::fully_initialized);
2045 br(Assembler::EQ, *L_fast_path);
2046
2047 // Fast path check: current thread is initializer thread
2048 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2049 cmp(rthread, scratch);
2050
2051 if (L_slow_path == &L_fallthrough) {
2052 br(Assembler::EQ, *L_fast_path);
2053 bind(*L_slow_path);
2054 } else if (L_fast_path == &L_fallthrough) {
2055 br(Assembler::NE, *L_slow_path);
2056 bind(*L_fast_path);
2057 } else {
2058 Unimplemented();
2059 }
2060 }
2061
2062 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2063 if (!VerifyOops) return;
2064
2065 // Pass register number to verify_oop_subroutine
2066 const char* b = nullptr;
2067 {
2068 ResourceMark rm;
2069 stringStream ss;
2070 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2071 b = code_string(ss.as_string());
2072 }
2073 BLOCK_COMMENT("verify_oop {");
2074
2075 strip_return_address(); // This might happen within a stack frame.
2076 protect_return_address();
2077 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2078 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2079
2080 mov(r0, reg);
2081 movptr(rscratch1, (uintptr_t)(address)b);
2082
2083 // call indirectly to solve generation ordering problem
2084 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2085 ldr(rscratch2, Address(rscratch2));
2086 blr(rscratch2);
2087
2088 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2089 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2090 authenticate_return_address();
2091
2092 BLOCK_COMMENT("} verify_oop");
2093 }
2094
2095 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2096 if (!VerifyOops) return;
2097
2098 const char* b = nullptr;
2099 {
2100 ResourceMark rm;
2101 stringStream ss;
2102 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2103 b = code_string(ss.as_string());
2104 }
2105 BLOCK_COMMENT("verify_oop_addr {");
2106
2107 strip_return_address(); // This might happen within a stack frame.
2108 protect_return_address();
2109 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2110 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2111
2112 // addr may contain sp so we will have to adjust it based on the
2113 // pushes that we just did.
2114 if (addr.uses(sp)) {
2115 lea(r0, addr);
2116 ldr(r0, Address(r0, 4 * wordSize));
2174 call_VM_leaf_base(entry_point, 1);
2175 }
2176
2177 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2178 assert_different_registers(arg_1, c_rarg0);
2179 pass_arg0(this, arg_0);
2180 pass_arg1(this, arg_1);
2181 call_VM_leaf_base(entry_point, 2);
2182 }
2183
2184 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2185 Register arg_1, Register arg_2) {
2186 assert_different_registers(arg_1, c_rarg0);
2187 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2188 pass_arg0(this, arg_0);
2189 pass_arg1(this, arg_1);
2190 pass_arg2(this, arg_2);
2191 call_VM_leaf_base(entry_point, 3);
2192 }
2193
2194 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2195 pass_arg0(this, arg_0);
2196 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2197 }
2198
2199 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2200
2201 assert_different_registers(arg_0, c_rarg1);
2202 pass_arg1(this, arg_1);
2203 pass_arg0(this, arg_0);
2204 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2205 }
2206
2207 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2208 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2209 assert_different_registers(arg_1, c_rarg2);
2210 pass_arg2(this, arg_2);
2211 pass_arg1(this, arg_1);
2212 pass_arg0(this, arg_0);
2213 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2219 assert_different_registers(arg_2, c_rarg3);
2220 pass_arg3(this, arg_3);
2221 pass_arg2(this, arg_2);
2222 pass_arg1(this, arg_1);
2223 pass_arg0(this, arg_0);
2224 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2225 }
2226
2227 void MacroAssembler::null_check(Register reg, int offset) {
2228 if (needs_explicit_null_check(offset)) {
2229 // provoke OS null exception if reg is null by
2230 // accessing M[reg] w/o changing any registers
2231 // NOTE: this is plenty to provoke a segv
2232 ldr(zr, Address(reg));
2233 } else {
2234 // nothing to do, (later) access of M[reg + offset]
2235 // will provoke OS null exception if reg is null
2236 }
2237 }
2238
2239 // MacroAssembler protected routines needed to implement
2240 // public methods
2241
2242 void MacroAssembler::mov(Register r, Address dest) {
2243 code_section()->relocate(pc(), dest.rspec());
2244 uint64_t imm64 = (uint64_t)dest.target();
2245 movptr(r, imm64);
2246 }
2247
2248 // Move a constant pointer into r. In AArch64 mode the virtual
2249 // address space is 48 bits in size, so we only need three
2250 // instructions to create a patchable instruction sequence that can
2251 // reach anywhere.
2252 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2253 #ifndef PRODUCT
2254 {
2255 char buffer[64];
2256 snprintf(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2257 block_comment(buffer);
2258 }
5006 adrp(rscratch1, src2, offset);
5007 ldr(rscratch1, Address(rscratch1, offset));
5008 cmp(src1, rscratch1);
5009 }
5010
5011 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5012 cmp(obj1, obj2);
5013 }
5014
5015 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5016 load_method_holder(rresult, rmethod);
5017 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5018 }
5019
5020 void MacroAssembler::load_method_holder(Register holder, Register method) {
5021 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5022 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5023 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5024 }
5025
5026 // Loads the obj's Klass* into dst.
5027 // Preserves all registers (incl src, rscratch1 and rscratch2).
5028 // Input:
5029 // src - the oop we want to load the klass from.
5030 // dst - output narrow klass.
5031 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5032 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5033 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5034 lsr(dst, dst, markWord::klass_shift);
5035 }
5036
5037 void MacroAssembler::load_klass(Register dst, Register src) {
5038 if (UseCompactObjectHeaders) {
5039 load_narrow_klass_compact(dst, src);
5040 decode_klass_not_null(dst);
5041 } else if (UseCompressedClassPointers) {
5042 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5043 decode_klass_not_null(dst);
5044 } else {
5045 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5116 }
5117 cmp(klass, tmp);
5118 }
5119
5120 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5121 if (UseCompactObjectHeaders) {
5122 load_narrow_klass_compact(tmp1, obj1);
5123 load_narrow_klass_compact(tmp2, obj2);
5124 cmpw(tmp1, tmp2);
5125 } else if (UseCompressedClassPointers) {
5126 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5127 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5128 cmpw(tmp1, tmp2);
5129 } else {
5130 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5131 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5132 cmp(tmp1, tmp2);
5133 }
5134 }
5135
5136 void MacroAssembler::store_klass(Register dst, Register src) {
5137 // FIXME: Should this be a store release? concurrent gcs assumes
5138 // klass length is valid if klass field is not null.
5139 assert(!UseCompactObjectHeaders, "not with compact headers");
5140 if (UseCompressedClassPointers) {
5141 encode_klass_not_null(src);
5142 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5143 } else {
5144 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5145 }
5146 }
5147
5148 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5149 assert(!UseCompactObjectHeaders, "not with compact headers");
5150 if (UseCompressedClassPointers) {
5151 // Store to klass gap in destination
5152 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5153 }
5154 }
5155
5456 if (as_raw) {
5457 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5458 } else {
5459 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5460 }
5461 }
5462
5463 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5464 Address dst, Register val,
5465 Register tmp1, Register tmp2, Register tmp3) {
5466 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5467 decorators = AccessInternal::decorator_fixup(decorators, type);
5468 bool as_raw = (decorators & AS_RAW) != 0;
5469 if (as_raw) {
5470 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5471 } else {
5472 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5473 }
5474 }
5475
5476 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5477 Register tmp2, DecoratorSet decorators) {
5478 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5479 }
5480
5481 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5482 Register tmp2, DecoratorSet decorators) {
5483 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5484 }
5485
5486 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5487 Register tmp2, Register tmp3, DecoratorSet decorators) {
5488 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5489 }
5490
5491 // Used for storing nulls.
5492 void MacroAssembler::store_heap_oop_null(Address dst) {
5493 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5494 }
5495
5532 oop_index = oop_recorder()->allocate_metadata_index(obj);
5533 } else {
5534 oop_index = oop_recorder()->find_index(obj);
5535 }
5536 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5537 mov(dst, Address((address)obj, rspec));
5538 }
5539
5540 Address MacroAssembler::constant_oop_address(jobject obj) {
5541 #ifdef ASSERT
5542 {
5543 ThreadInVMfromUnknown tiv;
5544 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5545 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5546 }
5547 #endif
5548 int oop_index = oop_recorder()->find_index(obj);
5549 return Address((address)obj, oop_Relocation::spec(oop_index));
5550 }
5551
5552 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5553 void MacroAssembler::tlab_allocate(Register obj,
5554 Register var_size_in_bytes,
5555 int con_size_in_bytes,
5556 Register t1,
5557 Register t2,
5558 Label& slow_case) {
5559 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5560 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5561 }
5562
5563 void MacroAssembler::inc_held_monitor_count(Register tmp) {
5564 Address dst(rthread, JavaThread::held_monitor_count_offset());
5565 #ifdef ASSERT
5566 ldr(tmp, dst);
5567 increment(tmp);
5568 str(tmp, dst);
5569 Label ok;
5570 tbz(tmp, 63, ok);
5571 STOP("assert(held monitor count underflow)");
5603 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5604 cmp(rscratch2, rscratch1);
5605 br(Assembler::HS, next);
5606 STOP("assert(top >= start)");
5607 should_not_reach_here();
5608
5609 bind(next);
5610 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5611 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5612 cmp(rscratch2, rscratch1);
5613 br(Assembler::HS, ok);
5614 STOP("assert(top <= end)");
5615 should_not_reach_here();
5616
5617 bind(ok);
5618 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5619 }
5620 #endif
5621 }
5622
5623 // Writes to stack successive pages until offset reached to check for
5624 // stack overflow + shadow pages. This clobbers tmp.
5625 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5626 assert_different_registers(tmp, size, rscratch1);
5627 mov(tmp, sp);
5628 // Bang stack for total size given plus shadow page size.
5629 // Bang one page at a time because large size can bang beyond yellow and
5630 // red zones.
5631 Label loop;
5632 mov(rscratch1, (int)os::vm_page_size());
5633 bind(loop);
5634 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5635 subsw(size, size, rscratch1);
5636 str(size, Address(tmp));
5637 br(Assembler::GT, loop);
5638
5639 // Bang down shadow pages too.
5640 // At this point, (tmp-0) is the last address touched, so don't
5641 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5642 // was post-decremented.) Skip this address by starting at i=1, and
5728 }
5729
5730 void MacroAssembler::remove_frame(int framesize) {
5731 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
5732 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
5733 if (framesize < ((1 << 9) + 2 * wordSize)) {
5734 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
5735 add(sp, sp, framesize);
5736 } else {
5737 if (framesize < ((1 << 12) + 2 * wordSize))
5738 add(sp, sp, framesize - 2 * wordSize);
5739 else {
5740 mov(rscratch1, framesize - 2 * wordSize);
5741 add(sp, sp, rscratch1);
5742 }
5743 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
5744 }
5745 authenticate_return_address();
5746 }
5747
5748
5749 // This method counts leading positive bytes (highest bit not set) in provided byte array
5750 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
5751 // Simple and most common case of aligned small array which is not at the
5752 // end of memory page is placed here. All other cases are in stub.
5753 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
5754 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
5755 assert_different_registers(ary1, len, result);
5756
5757 mov(result, len);
5758 cmpw(len, 0);
5759 br(LE, DONE);
5760 cmpw(len, 4 * wordSize);
5761 br(GE, STUB_LONG); // size > 32 then go to stub
5762
5763 int shift = 64 - exact_log2(os::vm_page_size());
5764 lsl(rscratch1, ary1, shift);
5765 mov(rscratch2, (size_t)(4 * wordSize) << shift);
5766 adds(rscratch2, rscratch1, rscratch2); // At end of page?
5767 br(CS, STUB); // at the end of page then go to stub
6641 // On other systems, the helper is a usual C function.
6642 //
6643 void MacroAssembler::get_thread(Register dst) {
6644 RegSet saved_regs =
6645 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6646 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6647
6648 protect_return_address();
6649 push(saved_regs, sp);
6650
6651 mov(lr, CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper));
6652 blr(lr);
6653 if (dst != c_rarg0) {
6654 mov(dst, c_rarg0);
6655 }
6656
6657 pop(saved_regs, sp);
6658 authenticate_return_address();
6659 }
6660
6661 void MacroAssembler::cache_wb(Address line) {
6662 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
6663 assert(line.index() == noreg, "index should be noreg");
6664 assert(line.offset() == 0, "offset should be 0");
6665 // would like to assert this
6666 // assert(line._ext.shift == 0, "shift should be zero");
6667 if (VM_Version::supports_dcpop()) {
6668 // writeback using clear virtual address to point of persistence
6669 dc(Assembler::CVAP, line.base());
6670 } else {
6671 // no need to generate anything as Unsafe.writebackMemory should
6672 // never invoke this stub
6673 }
6674 }
6675
6676 void MacroAssembler::cache_wbsync(bool is_pre) {
6677 // we only need a barrier post sync
6678 if (!is_pre) {
6679 membar(Assembler::AnyAny);
6680 }
7039 }
7040
7041 // Check if the lock-stack is full.
7042 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7043 cmpw(top, (unsigned)LockStack::end_offset());
7044 br(Assembler::GE, slow);
7045
7046 // Check for recursion.
7047 subw(t, top, oopSize);
7048 ldr(t, Address(rthread, t));
7049 cmp(obj, t);
7050 br(Assembler::EQ, push);
7051
7052 // Check header for monitor (0b10).
7053 tst(mark, markWord::monitor_value);
7054 br(Assembler::NE, slow);
7055
7056 // Try to lock. Transition lock bits 0b01 => 0b00
7057 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7058 orr(mark, mark, markWord::unlocked_value);
7059 eor(t, mark, markWord::unlocked_value);
7060 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7061 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7062 br(Assembler::NE, slow);
7063
7064 bind(push);
7065 // After successful lock, push object on lock-stack.
7066 str(obj, Address(rthread, top));
7067 addw(top, top, oopSize);
7068 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7069 }
7070
7071 // Implements lightweight-unlocking.
7072 //
7073 // - obj: the object to be unlocked
7074 // - t1, t2, t3: temporary registers
7075 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7076 void MacroAssembler::lightweight_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7077 assert(LockingMode == LM_LIGHTWEIGHT, "only used with new lightweight locking");
7078 // cmpxchg clobbers rscratch1.
|
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/assembler.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "ci/ciEnv.hpp"
29 #include "ci/ciInlineKlass.hpp"
30 #include "code/compiledIC.hpp"
31 #include "compiler/compileTask.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "gc/shared/cardTableBarrierSet.hpp"
37 #include "gc/shared/cardTable.hpp"
38 #include "gc/shared/collectedHeap.hpp"
39 #include "gc/shared/tlab_globals.hpp"
40 #include "interpreter/bytecodeHistogram.hpp"
41 #include "interpreter/interpreter.hpp"
42 #include "interpreter/interpreterRuntime.hpp"
43 #include "jvm.h"
44 #include "memory/resourceArea.hpp"
45 #include "memory/universe.hpp"
46 #include "nativeInst_aarch64.hpp"
47 #include "oops/accessDecorators.hpp"
48 #include "oops/compressedKlass.inline.hpp"
49 #include "oops/compressedOops.inline.hpp"
50 #include "oops/klass.inline.hpp"
51 #include "oops/resolvedFieldEntry.hpp"
52 #include "runtime/continuation.hpp"
53 #include "runtime/globals.hpp"
54 #include "runtime/icache.hpp"
55 #include "runtime/interfaceSupport.inline.hpp"
56 #include "runtime/javaThread.hpp"
57 #include "runtime/jniHandles.inline.hpp"
58 #include "runtime/sharedRuntime.hpp"
59 #include "runtime/signature_cc.hpp"
60 #include "runtime/stubRoutines.hpp"
61 #include "utilities/globalDefinitions.hpp"
62 #include "utilities/powerOfTwo.hpp"
63 #include "vmreg_aarch64.inline.hpp"
64 #ifdef COMPILER1
65 #include "c1/c1_LIRAssembler.hpp"
66 #endif
67 #ifdef COMPILER2
68 #include "oops/oop.hpp"
69 #include "opto/compile.hpp"
70 #include "opto/node.hpp"
71 #include "opto/output.hpp"
72 #endif
73
74 #include <sys/types.h>
75
76 #ifdef PRODUCT
77 #define BLOCK_COMMENT(str) /* nothing */
78 #else
79 #define BLOCK_COMMENT(str) block_comment(str)
80 #endif
81 #define STOP(str) stop(str);
82 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
83
2048 ldarb(scratch, scratch);
2049 subs(zr, scratch, InstanceKlass::fully_initialized);
2050 br(Assembler::EQ, *L_fast_path);
2051
2052 // Fast path check: current thread is initializer thread
2053 ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
2054 cmp(rthread, scratch);
2055
2056 if (L_slow_path == &L_fallthrough) {
2057 br(Assembler::EQ, *L_fast_path);
2058 bind(*L_slow_path);
2059 } else if (L_fast_path == &L_fallthrough) {
2060 br(Assembler::NE, *L_slow_path);
2061 bind(*L_fast_path);
2062 } else {
2063 Unimplemented();
2064 }
2065 }
2066
2067 void MacroAssembler::_verify_oop(Register reg, const char* s, const char* file, int line) {
2068 if (!VerifyOops || VerifyAdapterSharing) {
2069 // Below address of the code string confuses VerifyAdapterSharing
2070 // because it may differ between otherwise equivalent adapters.
2071 return;
2072 }
2073
2074 // Pass register number to verify_oop_subroutine
2075 const char* b = nullptr;
2076 {
2077 ResourceMark rm;
2078 stringStream ss;
2079 ss.print("verify_oop: %s: %s (%s:%d)", reg->name(), s, file, line);
2080 b = code_string(ss.as_string());
2081 }
2082 BLOCK_COMMENT("verify_oop {");
2083
2084 strip_return_address(); // This might happen within a stack frame.
2085 protect_return_address();
2086 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2087 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2088
2089 mov(r0, reg);
2090 movptr(rscratch1, (uintptr_t)(address)b);
2091
2092 // call indirectly to solve generation ordering problem
2093 lea(rscratch2, RuntimeAddress(StubRoutines::verify_oop_subroutine_entry_address()));
2094 ldr(rscratch2, Address(rscratch2));
2095 blr(rscratch2);
2096
2097 ldp(rscratch2, lr, Address(post(sp, 2 * wordSize)));
2098 ldp(r0, rscratch1, Address(post(sp, 2 * wordSize)));
2099 authenticate_return_address();
2100
2101 BLOCK_COMMENT("} verify_oop");
2102 }
2103
2104 void MacroAssembler::_verify_oop_addr(Address addr, const char* s, const char* file, int line) {
2105 if (!VerifyOops || VerifyAdapterSharing) {
2106 // Below address of the code string confuses VerifyAdapterSharing
2107 // because it may differ between otherwise equivalent adapters.
2108 return;
2109 }
2110
2111 const char* b = nullptr;
2112 {
2113 ResourceMark rm;
2114 stringStream ss;
2115 ss.print("verify_oop_addr: %s (%s:%d)", s, file, line);
2116 b = code_string(ss.as_string());
2117 }
2118 BLOCK_COMMENT("verify_oop_addr {");
2119
2120 strip_return_address(); // This might happen within a stack frame.
2121 protect_return_address();
2122 stp(r0, rscratch1, Address(pre(sp, -2 * wordSize)));
2123 stp(rscratch2, lr, Address(pre(sp, -2 * wordSize)));
2124
2125 // addr may contain sp so we will have to adjust it based on the
2126 // pushes that we just did.
2127 if (addr.uses(sp)) {
2128 lea(r0, addr);
2129 ldr(r0, Address(r0, 4 * wordSize));
2187 call_VM_leaf_base(entry_point, 1);
2188 }
2189
2190 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2191 assert_different_registers(arg_1, c_rarg0);
2192 pass_arg0(this, arg_0);
2193 pass_arg1(this, arg_1);
2194 call_VM_leaf_base(entry_point, 2);
2195 }
2196
2197 void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0,
2198 Register arg_1, Register arg_2) {
2199 assert_different_registers(arg_1, c_rarg0);
2200 assert_different_registers(arg_2, c_rarg0, c_rarg1);
2201 pass_arg0(this, arg_0);
2202 pass_arg1(this, arg_1);
2203 pass_arg2(this, arg_2);
2204 call_VM_leaf_base(entry_point, 3);
2205 }
2206
2207 void MacroAssembler::super_call_VM_leaf(address entry_point) {
2208 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2209 }
2210
2211 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) {
2212 pass_arg0(this, arg_0);
2213 MacroAssembler::call_VM_leaf_base(entry_point, 1);
2214 }
2215
2216 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1) {
2217
2218 assert_different_registers(arg_0, c_rarg1);
2219 pass_arg1(this, arg_1);
2220 pass_arg0(this, arg_0);
2221 MacroAssembler::call_VM_leaf_base(entry_point, 2);
2222 }
2223
2224 void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) {
2225 assert_different_registers(arg_0, c_rarg1, c_rarg2);
2226 assert_different_registers(arg_1, c_rarg2);
2227 pass_arg2(this, arg_2);
2228 pass_arg1(this, arg_1);
2229 pass_arg0(this, arg_0);
2230 MacroAssembler::call_VM_leaf_base(entry_point, 3);
2236 assert_different_registers(arg_2, c_rarg3);
2237 pass_arg3(this, arg_3);
2238 pass_arg2(this, arg_2);
2239 pass_arg1(this, arg_1);
2240 pass_arg0(this, arg_0);
2241 MacroAssembler::call_VM_leaf_base(entry_point, 4);
2242 }
2243
2244 void MacroAssembler::null_check(Register reg, int offset) {
2245 if (needs_explicit_null_check(offset)) {
2246 // provoke OS null exception if reg is null by
2247 // accessing M[reg] w/o changing any registers
2248 // NOTE: this is plenty to provoke a segv
2249 ldr(zr, Address(reg));
2250 } else {
2251 // nothing to do, (later) access of M[reg + offset]
2252 // will provoke OS null exception if reg is null
2253 }
2254 }
2255
2256 void MacroAssembler::test_markword_is_inline_type(Register markword, Label& is_inline_type) {
2257 assert_different_registers(markword, rscratch2);
2258 mov(rscratch2, markWord::inline_type_mask_in_place);
2259 andr(markword, markword, rscratch2);
2260 mov(rscratch2, markWord::inline_type_pattern);
2261 cmp(markword, rscratch2);
2262 br(Assembler::EQ, is_inline_type);
2263 }
2264
2265 void MacroAssembler::test_klass_is_inline_type(Register klass, Register temp_reg, Label& is_inline_type) {
2266 ldrh(temp_reg, Address(klass, Klass::access_flags_offset()));
2267 andr(temp_reg, temp_reg, JVM_ACC_IDENTITY);
2268 cbz(temp_reg, is_inline_type);
2269 }
2270
2271 void MacroAssembler::test_oop_is_not_inline_type(Register object, Register tmp, Label& not_inline_type) {
2272 assert_different_registers(tmp, rscratch1);
2273 cbz(object, not_inline_type);
2274 const int is_inline_type_mask = markWord::inline_type_pattern;
2275 ldr(tmp, Address(object, oopDesc::mark_offset_in_bytes()));
2276 mov(rscratch1, is_inline_type_mask);
2277 andr(tmp, tmp, rscratch1);
2278 cmp(tmp, rscratch1);
2279 br(Assembler::NE, not_inline_type);
2280 }
2281
2282 void MacroAssembler::test_field_is_null_free_inline_type(Register flags, Register temp_reg, Label& is_null_free_inline_type) {
2283 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2284 tbnz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, is_null_free_inline_type);
2285 }
2286
2287 void MacroAssembler::test_field_is_not_null_free_inline_type(Register flags, Register temp_reg, Label& not_null_free_inline_type) {
2288 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2289 tbz(flags, ResolvedFieldEntry::is_null_free_inline_type_shift, not_null_free_inline_type);
2290 }
2291
2292 void MacroAssembler::test_field_is_flat(Register flags, Register temp_reg, Label& is_flat) {
2293 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2294 tbnz(flags, ResolvedFieldEntry::is_flat_shift, is_flat);
2295 }
2296
2297 void MacroAssembler::test_field_has_null_marker(Register flags, Register temp_reg, Label& has_null_marker) {
2298 assert(temp_reg == noreg, "not needed"); // keep signature uniform with x86
2299 tbnz(flags, ResolvedFieldEntry::has_null_marker_shift, has_null_marker);
2300 }
2301
2302 void MacroAssembler::test_oop_prototype_bit(Register oop, Register temp_reg, int32_t test_bit, bool jmp_set, Label& jmp_label) {
2303 Label test_mark_word;
2304 // load mark word
2305 ldr(temp_reg, Address(oop, oopDesc::mark_offset_in_bytes()));
2306 // check displaced
2307 tst(temp_reg, markWord::unlocked_value);
2308 br(Assembler::NE, test_mark_word);
2309 // slow path use klass prototype
2310 load_prototype_header(temp_reg, oop);
2311
2312 bind(test_mark_word);
2313 andr(temp_reg, temp_reg, test_bit);
2314 if (jmp_set) {
2315 cbnz(temp_reg, jmp_label);
2316 } else {
2317 cbz(temp_reg, jmp_label);
2318 }
2319 }
2320
2321 void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flat_array) {
2322 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, true, is_flat_array);
2323 }
2324
2325 void MacroAssembler::test_non_flat_array_oop(Register oop, Register temp_reg,
2326 Label&is_non_flat_array) {
2327 test_oop_prototype_bit(oop, temp_reg, markWord::flat_array_bit_in_place, false, is_non_flat_array);
2328 }
2329
2330 void MacroAssembler::test_null_free_array_oop(Register oop, Register temp_reg, Label& is_null_free_array) {
2331 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, true, is_null_free_array);
2332 }
2333
2334 void MacroAssembler::test_non_null_free_array_oop(Register oop, Register temp_reg, Label&is_non_null_free_array) {
2335 test_oop_prototype_bit(oop, temp_reg, markWord::null_free_array_bit_in_place, false, is_non_null_free_array);
2336 }
2337
2338 void MacroAssembler::test_flat_array_layout(Register lh, Label& is_flat_array) {
2339 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2340 br(Assembler::NE, is_flat_array);
2341 }
2342
2343 void MacroAssembler::test_non_flat_array_layout(Register lh, Label& is_non_flat_array) {
2344 tst(lh, Klass::_lh_array_tag_flat_value_bit_inplace);
2345 br(Assembler::EQ, is_non_flat_array);
2346 }
2347
2348 // MacroAssembler protected routines needed to implement
2349 // public methods
2350
2351 void MacroAssembler::mov(Register r, Address dest) {
2352 code_section()->relocate(pc(), dest.rspec());
2353 uint64_t imm64 = (uint64_t)dest.target();
2354 movptr(r, imm64);
2355 }
2356
2357 // Move a constant pointer into r. In AArch64 mode the virtual
2358 // address space is 48 bits in size, so we only need three
2359 // instructions to create a patchable instruction sequence that can
2360 // reach anywhere.
2361 void MacroAssembler::movptr(Register r, uintptr_t imm64) {
2362 #ifndef PRODUCT
2363 {
2364 char buffer[64];
2365 snprintf(buffer, sizeof(buffer), "0x%" PRIX64, (uint64_t)imm64);
2366 block_comment(buffer);
2367 }
5115 adrp(rscratch1, src2, offset);
5116 ldr(rscratch1, Address(rscratch1, offset));
5117 cmp(src1, rscratch1);
5118 }
5119
5120 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
5121 cmp(obj1, obj2);
5122 }
5123
5124 void MacroAssembler::load_method_holder_cld(Register rresult, Register rmethod) {
5125 load_method_holder(rresult, rmethod);
5126 ldr(rresult, Address(rresult, InstanceKlass::class_loader_data_offset()));
5127 }
5128
5129 void MacroAssembler::load_method_holder(Register holder, Register method) {
5130 ldr(holder, Address(method, Method::const_offset())); // ConstMethod*
5131 ldr(holder, Address(holder, ConstMethod::constants_offset())); // ConstantPool*
5132 ldr(holder, Address(holder, ConstantPool::pool_holder_offset())); // InstanceKlass*
5133 }
5134
5135 void MacroAssembler::load_metadata(Register dst, Register src) {
5136 if (UseCompactObjectHeaders) {
5137 load_narrow_klass_compact(dst, src);
5138 } else if (UseCompressedClassPointers) {
5139 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5140 } else {
5141 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5142 }
5143 }
5144
5145 // Loads the obj's Klass* into dst.
5146 // Preserves all registers (incl src, rscratch1 and rscratch2).
5147 // Input:
5148 // src - the oop we want to load the klass from.
5149 // dst - output narrow klass.
5150 void MacroAssembler::load_narrow_klass_compact(Register dst, Register src) {
5151 assert(UseCompactObjectHeaders, "expects UseCompactObjectHeaders");
5152 ldr(dst, Address(src, oopDesc::mark_offset_in_bytes()));
5153 lsr(dst, dst, markWord::klass_shift);
5154 }
5155
5156 void MacroAssembler::load_klass(Register dst, Register src) {
5157 if (UseCompactObjectHeaders) {
5158 load_narrow_klass_compact(dst, src);
5159 decode_klass_not_null(dst);
5160 } else if (UseCompressedClassPointers) {
5161 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5162 decode_klass_not_null(dst);
5163 } else {
5164 ldr(dst, Address(src, oopDesc::klass_offset_in_bytes()));
5235 }
5236 cmp(klass, tmp);
5237 }
5238
5239 void MacroAssembler::cmp_klasses_from_objects(Register obj1, Register obj2, Register tmp1, Register tmp2) {
5240 if (UseCompactObjectHeaders) {
5241 load_narrow_klass_compact(tmp1, obj1);
5242 load_narrow_klass_compact(tmp2, obj2);
5243 cmpw(tmp1, tmp2);
5244 } else if (UseCompressedClassPointers) {
5245 ldrw(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5246 ldrw(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5247 cmpw(tmp1, tmp2);
5248 } else {
5249 ldr(tmp1, Address(obj1, oopDesc::klass_offset_in_bytes()));
5250 ldr(tmp2, Address(obj2, oopDesc::klass_offset_in_bytes()));
5251 cmp(tmp1, tmp2);
5252 }
5253 }
5254
5255 void MacroAssembler::load_prototype_header(Register dst, Register src) {
5256 load_klass(dst, src);
5257 ldr(dst, Address(dst, Klass::prototype_header_offset()));
5258 }
5259
5260 void MacroAssembler::store_klass(Register dst, Register src) {
5261 // FIXME: Should this be a store release? concurrent gcs assumes
5262 // klass length is valid if klass field is not null.
5263 assert(!UseCompactObjectHeaders, "not with compact headers");
5264 if (UseCompressedClassPointers) {
5265 encode_klass_not_null(src);
5266 strw(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5267 } else {
5268 str(src, Address(dst, oopDesc::klass_offset_in_bytes()));
5269 }
5270 }
5271
5272 void MacroAssembler::store_klass_gap(Register dst, Register src) {
5273 assert(!UseCompactObjectHeaders, "not with compact headers");
5274 if (UseCompressedClassPointers) {
5275 // Store to klass gap in destination
5276 strw(src, Address(dst, oopDesc::klass_gap_offset_in_bytes()));
5277 }
5278 }
5279
5580 if (as_raw) {
5581 bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
5582 } else {
5583 bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
5584 }
5585 }
5586
5587 void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
5588 Address dst, Register val,
5589 Register tmp1, Register tmp2, Register tmp3) {
5590 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5591 decorators = AccessInternal::decorator_fixup(decorators, type);
5592 bool as_raw = (decorators & AS_RAW) != 0;
5593 if (as_raw) {
5594 bs->BarrierSetAssembler::store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5595 } else {
5596 bs->store_at(this, decorators, type, dst, val, tmp1, tmp2, tmp3);
5597 }
5598 }
5599
5600 void MacroAssembler::flat_field_copy(DecoratorSet decorators, Register src, Register dst,
5601 Register inline_layout_info) {
5602 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
5603 bs->flat_field_copy(this, decorators, src, dst, inline_layout_info);
5604 }
5605
5606 void MacroAssembler::payload_offset(Register inline_klass, Register offset) {
5607 ldr(offset, Address(inline_klass, InstanceKlass::adr_inlineklass_fixed_block_offset()));
5608 ldrw(offset, Address(offset, InlineKlass::payload_offset_offset()));
5609 }
5610
5611 void MacroAssembler::payload_address(Register oop, Register data, Register inline_klass) {
5612 // ((address) (void*) o) + vk->payload_offset();
5613 Register offset = (data == oop) ? rscratch1 : data;
5614 payload_offset(inline_klass, offset);
5615 if (data == oop) {
5616 add(data, data, offset);
5617 } else {
5618 lea(data, Address(oop, offset));
5619 }
5620 }
5621
5622 void MacroAssembler::data_for_value_array_index(Register array, Register array_klass,
5623 Register index, Register data) {
5624 assert_different_registers(array, array_klass, index);
5625 assert_different_registers(rscratch1, array, index);
5626
5627 // array->base() + (index << Klass::layout_helper_log2_element_size(lh));
5628 ldrw(rscratch1, Address(array_klass, Klass::layout_helper_offset()));
5629
5630 // Klass::layout_helper_log2_element_size(lh)
5631 // (lh >> _lh_log2_element_size_shift) & _lh_log2_element_size_mask;
5632 lsr(rscratch1, rscratch1, Klass::_lh_log2_element_size_shift);
5633 andr(rscratch1, rscratch1, Klass::_lh_log2_element_size_mask);
5634 lslv(index, index, rscratch1);
5635
5636 add(data, array, index);
5637 add(data, data, arrayOopDesc::base_offset_in_bytes(T_FLAT_ELEMENT));
5638 }
5639
5640 void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
5641 Register tmp2, DecoratorSet decorators) {
5642 access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
5643 }
5644
5645 void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
5646 Register tmp2, DecoratorSet decorators) {
5647 access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
5648 }
5649
5650 void MacroAssembler::store_heap_oop(Address dst, Register val, Register tmp1,
5651 Register tmp2, Register tmp3, DecoratorSet decorators) {
5652 access_store_at(T_OBJECT, IN_HEAP | decorators, dst, val, tmp1, tmp2, tmp3);
5653 }
5654
5655 // Used for storing nulls.
5656 void MacroAssembler::store_heap_oop_null(Address dst) {
5657 access_store_at(T_OBJECT, IN_HEAP, dst, noreg, noreg, noreg, noreg);
5658 }
5659
5696 oop_index = oop_recorder()->allocate_metadata_index(obj);
5697 } else {
5698 oop_index = oop_recorder()->find_index(obj);
5699 }
5700 RelocationHolder rspec = metadata_Relocation::spec(oop_index);
5701 mov(dst, Address((address)obj, rspec));
5702 }
5703
5704 Address MacroAssembler::constant_oop_address(jobject obj) {
5705 #ifdef ASSERT
5706 {
5707 ThreadInVMfromUnknown tiv;
5708 assert(oop_recorder() != nullptr, "this assembler needs an OopRecorder");
5709 assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
5710 }
5711 #endif
5712 int oop_index = oop_recorder()->find_index(obj);
5713 return Address((address)obj, oop_Relocation::spec(oop_index));
5714 }
5715
5716 // Object / value buffer allocation...
5717 void MacroAssembler::allocate_instance(Register klass, Register new_obj,
5718 Register t1, Register t2,
5719 bool clear_fields, Label& alloc_failed)
5720 {
5721 Label done, initialize_header, initialize_object, slow_case, slow_case_no_pop;
5722 Register layout_size = t1;
5723 assert(new_obj == r0, "needs to be r0");
5724 assert_different_registers(klass, new_obj, t1, t2);
5725
5726 // get instance_size in InstanceKlass (scaled to a count of bytes)
5727 ldrw(layout_size, Address(klass, Klass::layout_helper_offset()));
5728 // test to see if it is malformed in some way
5729 tst(layout_size, Klass::_lh_instance_slow_path_bit);
5730 br(Assembler::NE, slow_case_no_pop);
5731
5732 // Allocate the instance:
5733 // If TLAB is enabled:
5734 // Try to allocate in the TLAB.
5735 // If fails, go to the slow path.
5736 // Initialize the allocation.
5737 // Exit.
5738 //
5739 // Go to slow path.
5740
5741 if (UseTLAB) {
5742 push(klass);
5743 tlab_allocate(new_obj, layout_size, 0, klass, t2, slow_case);
5744 if (ZeroTLAB || (!clear_fields)) {
5745 // the fields have been already cleared
5746 b(initialize_header);
5747 } else {
5748 // initialize both the header and fields
5749 b(initialize_object);
5750 }
5751
5752 if (clear_fields) {
5753 // The object is initialized before the header. If the object size is
5754 // zero, go directly to the header initialization.
5755 bind(initialize_object);
5756 int header_size = oopDesc::header_size() * HeapWordSize;
5757 assert(is_aligned(header_size, BytesPerLong), "oop header size must be 8-byte-aligned");
5758 subs(layout_size, layout_size, header_size);
5759 br(Assembler::EQ, initialize_header);
5760
5761 // Initialize topmost object field, divide size by 8, check if odd and
5762 // test if zero.
5763
5764 #ifdef ASSERT
5765 // make sure instance_size was multiple of 8
5766 Label L;
5767 tst(layout_size, 7);
5768 br(Assembler::EQ, L);
5769 stop("object size is not multiple of 8 - adjust this code");
5770 bind(L);
5771 // must be > 0, no extra check needed here
5772 #endif
5773
5774 lsr(layout_size, layout_size, LogBytesPerLong);
5775
5776 // initialize remaining object fields: instance_size was a multiple of 8
5777 {
5778 Label loop;
5779 Register base = t2;
5780
5781 bind(loop);
5782 add(rscratch1, new_obj, layout_size, Assembler::LSL, LogBytesPerLong);
5783 str(zr, Address(rscratch1, header_size - 1*oopSize));
5784 subs(layout_size, layout_size, 1);
5785 br(Assembler::NE, loop);
5786 }
5787 } // clear_fields
5788
5789 // initialize object header only.
5790 bind(initialize_header);
5791 pop(klass);
5792 Register mark_word = t2;
5793 if (UseCompactObjectHeaders || EnableValhalla) {
5794 ldr(mark_word, Address(klass, Klass::prototype_header_offset()));
5795 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5796 } else {
5797 mov(mark_word, (intptr_t)markWord::prototype().value());
5798 str(mark_word, Address(new_obj, oopDesc::mark_offset_in_bytes()));
5799 }
5800 if (!UseCompactObjectHeaders) {
5801 store_klass_gap(new_obj, zr); // zero klass gap for compressed oops
5802 mov(t2, klass); // preserve klass
5803 store_klass(new_obj, t2); // src klass reg is potentially compressed
5804 }
5805 // TODO: Valhalla removed SharedRuntime::dtrace_object_alloc from here ?
5806
5807 b(done);
5808 }
5809
5810 if (UseTLAB) {
5811 bind(slow_case);
5812 pop(klass);
5813 }
5814 bind(slow_case_no_pop);
5815 b(alloc_failed);
5816
5817 bind(done);
5818 }
5819
5820 // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
5821 void MacroAssembler::tlab_allocate(Register obj,
5822 Register var_size_in_bytes,
5823 int con_size_in_bytes,
5824 Register t1,
5825 Register t2,
5826 Label& slow_case) {
5827 BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
5828 bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
5829 }
5830
5831 void MacroAssembler::inc_held_monitor_count(Register tmp) {
5832 Address dst(rthread, JavaThread::held_monitor_count_offset());
5833 #ifdef ASSERT
5834 ldr(tmp, dst);
5835 increment(tmp);
5836 str(tmp, dst);
5837 Label ok;
5838 tbz(tmp, 63, ok);
5839 STOP("assert(held monitor count underflow)");
5871 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_start_offset())));
5872 cmp(rscratch2, rscratch1);
5873 br(Assembler::HS, next);
5874 STOP("assert(top >= start)");
5875 should_not_reach_here();
5876
5877 bind(next);
5878 ldr(rscratch2, Address(rthread, in_bytes(JavaThread::tlab_end_offset())));
5879 ldr(rscratch1, Address(rthread, in_bytes(JavaThread::tlab_top_offset())));
5880 cmp(rscratch2, rscratch1);
5881 br(Assembler::HS, ok);
5882 STOP("assert(top <= end)");
5883 should_not_reach_here();
5884
5885 bind(ok);
5886 ldp(rscratch2, rscratch1, Address(post(sp, 16)));
5887 }
5888 #endif
5889 }
5890
5891 void MacroAssembler::get_inline_type_field_klass(Register holder_klass, Register index, Register inline_klass) {
5892 inline_layout_info(holder_klass, index, inline_klass);
5893 ldr(inline_klass, Address(inline_klass, InlineLayoutInfo::klass_offset()));
5894 }
5895
5896 void MacroAssembler::inline_layout_info(Register holder_klass, Register index, Register layout_info) {
5897 assert_different_registers(holder_klass, index, layout_info);
5898 InlineLayoutInfo array[2];
5899 int size = (char*)&array[1] - (char*)&array[0]; // computing size of array elements
5900 if (is_power_of_2(size)) {
5901 lsl(index, index, log2i_exact(size)); // Scale index by power of 2
5902 } else {
5903 mov(layout_info, size);
5904 mul(index, index, layout_info); // Scale the index to be the entry index * array_element_size
5905 }
5906 ldr(layout_info, Address(holder_klass, InstanceKlass::inline_layout_info_array_offset()));
5907 add(layout_info, layout_info, Array<InlineLayoutInfo>::base_offset_in_bytes());
5908 lea(layout_info, Address(layout_info, index));
5909 }
5910
5911 // Writes to stack successive pages until offset reached to check for
5912 // stack overflow + shadow pages. This clobbers tmp.
5913 void MacroAssembler::bang_stack_size(Register size, Register tmp) {
5914 assert_different_registers(tmp, size, rscratch1);
5915 mov(tmp, sp);
5916 // Bang stack for total size given plus shadow page size.
5917 // Bang one page at a time because large size can bang beyond yellow and
5918 // red zones.
5919 Label loop;
5920 mov(rscratch1, (int)os::vm_page_size());
5921 bind(loop);
5922 lea(tmp, Address(tmp, -(int)os::vm_page_size()));
5923 subsw(size, size, rscratch1);
5924 str(size, Address(tmp));
5925 br(Assembler::GT, loop);
5926
5927 // Bang down shadow pages too.
5928 // At this point, (tmp-0) is the last address touched, so don't
5929 // touch it again. (It was touched as (tmp-pagesize) but then tmp
5930 // was post-decremented.) Skip this address by starting at i=1, and
6016 }
6017
6018 void MacroAssembler::remove_frame(int framesize) {
6019 assert(framesize >= 2 * wordSize, "framesize must include space for FP/LR");
6020 assert(framesize % (2*wordSize) == 0, "must preserve 2*wordSize alignment");
6021 if (framesize < ((1 << 9) + 2 * wordSize)) {
6022 ldp(rfp, lr, Address(sp, framesize - 2 * wordSize));
6023 add(sp, sp, framesize);
6024 } else {
6025 if (framesize < ((1 << 12) + 2 * wordSize))
6026 add(sp, sp, framesize - 2 * wordSize);
6027 else {
6028 mov(rscratch1, framesize - 2 * wordSize);
6029 add(sp, sp, rscratch1);
6030 }
6031 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6032 }
6033 authenticate_return_address();
6034 }
6035
6036 void MacroAssembler::remove_frame(int initial_framesize, bool needs_stack_repair) {
6037 if (needs_stack_repair) {
6038 // Remove the extension of the caller's frame used for inline type unpacking
6039 //
6040 // Right now the stack looks like this:
6041 //
6042 // | Arguments from caller |
6043 // |---------------------------| <-- caller's SP
6044 // | Saved LR #1 |
6045 // | Saved FP #1 |
6046 // |---------------------------|
6047 // | Extension space for |
6048 // | inline arg (un)packing |
6049 // |---------------------------| <-- start of this method's frame
6050 // | Saved LR #2 |
6051 // | Saved FP #2 |
6052 // |---------------------------| <-- FP
6053 // | sp_inc |
6054 // | method locals |
6055 // |---------------------------| <-- SP
6056 //
6057 // There are two copies of FP and LR on the stack. They will be identical
6058 // unless the caller has been deoptimized, in which case LR #1 will be patched
6059 // to point at the deopt blob, and LR #2 will still point into the old method.
6060 //
6061 // The sp_inc stack slot holds the total size of the frame including the
6062 // extension space minus two words for the saved FP and LR.
6063
6064 int sp_inc_offset = initial_framesize - 3 * wordSize; // Immediately below saved LR and FP
6065
6066 ldr(rscratch1, Address(sp, sp_inc_offset));
6067 add(sp, sp, rscratch1);
6068 ldp(rfp, lr, Address(post(sp, 2 * wordSize)));
6069 } else {
6070 remove_frame(initial_framesize);
6071 }
6072 }
6073
6074 void MacroAssembler::save_stack_increment(int sp_inc, int frame_size) {
6075 int real_frame_size = frame_size + sp_inc;
6076 assert(sp_inc == 0 || sp_inc > 2*wordSize, "invalid sp_inc value");
6077 assert(real_frame_size >= 2*wordSize, "frame size must include FP/LR space");
6078 assert((real_frame_size & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
6079
6080 int sp_inc_offset = frame_size - 3 * wordSize; // Immediately below saved LR and FP
6081
6082 // Subtract two words for the saved FP and LR as these will be popped
6083 // separately. See remove_frame above.
6084 mov(rscratch1, real_frame_size - 2*wordSize);
6085 str(rscratch1, Address(sp, sp_inc_offset));
6086 }
6087
6088 // This method counts leading positive bytes (highest bit not set) in provided byte array
6089 address MacroAssembler::count_positives(Register ary1, Register len, Register result) {
6090 // Simple and most common case of aligned small array which is not at the
6091 // end of memory page is placed here. All other cases are in stub.
6092 Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
6093 const uint64_t UPPER_BIT_MASK=0x8080808080808080;
6094 assert_different_registers(ary1, len, result);
6095
6096 mov(result, len);
6097 cmpw(len, 0);
6098 br(LE, DONE);
6099 cmpw(len, 4 * wordSize);
6100 br(GE, STUB_LONG); // size > 32 then go to stub
6101
6102 int shift = 64 - exact_log2(os::vm_page_size());
6103 lsl(rscratch1, ary1, shift);
6104 mov(rscratch2, (size_t)(4 * wordSize) << shift);
6105 adds(rscratch2, rscratch1, rscratch2); // At end of page?
6106 br(CS, STUB); // at the end of page then go to stub
6980 // On other systems, the helper is a usual C function.
6981 //
6982 void MacroAssembler::get_thread(Register dst) {
6983 RegSet saved_regs =
6984 LINUX_ONLY(RegSet::range(r0, r1) + lr - dst)
6985 NOT_LINUX (RegSet::range(r0, r17) + lr - dst);
6986
6987 protect_return_address();
6988 push(saved_regs, sp);
6989
6990 mov(lr, CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper));
6991 blr(lr);
6992 if (dst != c_rarg0) {
6993 mov(dst, c_rarg0);
6994 }
6995
6996 pop(saved_regs, sp);
6997 authenticate_return_address();
6998 }
6999
7000 #ifdef COMPILER2
7001 // C2 compiled method's prolog code
7002 // Moved here from aarch64.ad to support Valhalla code belows
7003 void MacroAssembler::verified_entry(Compile* C, int sp_inc) {
7004 if (C->clinit_barrier_on_entry()) {
7005 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
7006
7007 Label L_skip_barrier;
7008
7009 mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
7010 clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
7011 far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
7012 bind(L_skip_barrier);
7013 }
7014
7015 if (C->max_vector_size() > 0) {
7016 reinitialize_ptrue();
7017 }
7018
7019 int bangsize = C->output()->bang_size_in_bytes();
7020 if (C->output()->need_stack_bang(bangsize))
7021 generate_stack_overflow_check(bangsize);
7022
7023 // n.b. frame size includes space for return pc and rfp
7024 const long framesize = C->output()->frame_size_in_bytes();
7025 build_frame(framesize);
7026
7027 if (C->needs_stack_repair()) {
7028 save_stack_increment(sp_inc, framesize);
7029 }
7030
7031 if (VerifyStackAtCalls) {
7032 Unimplemented();
7033 }
7034 }
7035 #endif // COMPILER2
7036
7037 int MacroAssembler::store_inline_type_fields_to_buf(ciInlineKlass* vk, bool from_interpreter) {
7038 assert(InlineTypeReturnedAsFields, "Inline types should never be returned as fields");
7039 // An inline type might be returned. If fields are in registers we
7040 // need to allocate an inline type instance and initialize it with
7041 // the value of the fields.
7042 Label skip;
7043 // We only need a new buffered inline type if a new one is not returned
7044 tbz(r0, 0, skip);
7045 int call_offset = -1;
7046
7047 // Be careful not to clobber r1-7 which hold returned fields
7048 // Also do not use callee-saved registers as these may be live in the interpreter
7049 Register tmp1 = r13, tmp2 = r14, klass = r15, r0_preserved = r12;
7050
7051 // The following code is similar to allocate_instance but has some slight differences,
7052 // e.g. object size is always not zero, sometimes it's constant; storing klass ptr after
7053 // allocating is not necessary if vk != nullptr, etc. allocate_instance is not aware of these.
7054 Label slow_case;
7055 // 1. Try to allocate a new buffered inline instance either from TLAB or eden space
7056 mov(r0_preserved, r0); // save r0 for slow_case since *_allocate may corrupt it when allocation failed
7057
7058 if (vk != nullptr) {
7059 // Called from C1, where the return type is statically known.
7060 movptr(klass, (intptr_t)vk->get_InlineKlass());
7061 jint lh = vk->layout_helper();
7062 assert(lh != Klass::_lh_neutral_value, "inline class in return type must have been resolved");
7063 if (UseTLAB && !Klass::layout_helper_needs_slow_path(lh)) {
7064 tlab_allocate(r0, noreg, lh, tmp1, tmp2, slow_case);
7065 } else {
7066 b(slow_case);
7067 }
7068 } else {
7069 // Call from interpreter. R0 contains ((the InlineKlass* of the return type) | 0x01)
7070 andr(klass, r0, -2);
7071 if (UseTLAB) {
7072 ldrw(tmp2, Address(klass, Klass::layout_helper_offset()));
7073 tst(tmp2, Klass::_lh_instance_slow_path_bit);
7074 br(Assembler::NE, slow_case);
7075 tlab_allocate(r0, tmp2, 0, tmp1, tmp2, slow_case);
7076 } else {
7077 b(slow_case);
7078 }
7079 }
7080 if (UseTLAB) {
7081 // 2. Initialize buffered inline instance header
7082 Register buffer_obj = r0;
7083 if (UseCompactObjectHeaders) {
7084 ldr(rscratch1, Address(klass, Klass::prototype_header_offset()));
7085 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7086 } else {
7087 mov(rscratch1, (intptr_t)markWord::inline_type_prototype().value());
7088 str(rscratch1, Address(buffer_obj, oopDesc::mark_offset_in_bytes()));
7089 store_klass_gap(buffer_obj, zr);
7090 if (vk == nullptr) {
7091 // store_klass corrupts klass, so save it for later use (interpreter case only).
7092 mov(tmp1, klass);
7093 }
7094 store_klass(buffer_obj, klass);
7095 }
7096 // 3. Initialize its fields with an inline class specific handler
7097 if (vk != nullptr) {
7098 far_call(RuntimeAddress(vk->pack_handler())); // no need for call info as this will not safepoint.
7099 } else {
7100 // tmp1 holds klass preserved above
7101 ldr(tmp1, Address(tmp1, InstanceKlass::adr_inlineklass_fixed_block_offset()));
7102 ldr(tmp1, Address(tmp1, InlineKlass::pack_handler_offset()));
7103 blr(tmp1);
7104 }
7105
7106 membar(Assembler::StoreStore);
7107 b(skip);
7108 } else {
7109 // Must have already branched to slow_case above.
7110 DEBUG_ONLY(should_not_reach_here());
7111 }
7112 bind(slow_case);
7113 // We failed to allocate a new inline type, fall back to a runtime
7114 // call. Some oop field may be live in some registers but we can't
7115 // tell. That runtime call will take care of preserving them
7116 // across a GC if there's one.
7117 mov(r0, r0_preserved);
7118
7119 if (from_interpreter) {
7120 super_call_VM_leaf(StubRoutines::store_inline_type_fields_to_buf());
7121 } else {
7122 far_call(RuntimeAddress(StubRoutines::store_inline_type_fields_to_buf()));
7123 call_offset = offset();
7124 }
7125 membar(Assembler::StoreStore);
7126
7127 bind(skip);
7128 return call_offset;
7129 }
7130
7131 // Move a value between registers/stack slots and update the reg_state
7132 bool MacroAssembler::move_helper(VMReg from, VMReg to, BasicType bt, RegState reg_state[]) {
7133 assert(from->is_valid() && to->is_valid(), "source and destination must be valid");
7134 if (reg_state[to->value()] == reg_written) {
7135 return true; // Already written
7136 }
7137
7138 if (from != to && bt != T_VOID) {
7139 if (reg_state[to->value()] == reg_readonly) {
7140 return false; // Not yet writable
7141 }
7142 if (from->is_reg()) {
7143 if (to->is_reg()) {
7144 if (from->is_Register() && to->is_Register()) {
7145 mov(to->as_Register(), from->as_Register());
7146 } else if (from->is_FloatRegister() && to->is_FloatRegister()) {
7147 fmovd(to->as_FloatRegister(), from->as_FloatRegister());
7148 } else {
7149 ShouldNotReachHere();
7150 }
7151 } else {
7152 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7153 Address to_addr = Address(sp, st_off);
7154 if (from->is_FloatRegister()) {
7155 if (bt == T_DOUBLE) {
7156 strd(from->as_FloatRegister(), to_addr);
7157 } else {
7158 assert(bt == T_FLOAT, "must be float");
7159 strs(from->as_FloatRegister(), to_addr);
7160 }
7161 } else {
7162 str(from->as_Register(), to_addr);
7163 }
7164 }
7165 } else {
7166 Address from_addr = Address(sp, from->reg2stack() * VMRegImpl::stack_slot_size);
7167 if (to->is_reg()) {
7168 if (to->is_FloatRegister()) {
7169 if (bt == T_DOUBLE) {
7170 ldrd(to->as_FloatRegister(), from_addr);
7171 } else {
7172 assert(bt == T_FLOAT, "must be float");
7173 ldrs(to->as_FloatRegister(), from_addr);
7174 }
7175 } else {
7176 ldr(to->as_Register(), from_addr);
7177 }
7178 } else {
7179 int st_off = to->reg2stack() * VMRegImpl::stack_slot_size;
7180 ldr(rscratch1, from_addr);
7181 str(rscratch1, Address(sp, st_off));
7182 }
7183 }
7184 }
7185
7186 // Update register states
7187 reg_state[from->value()] = reg_writable;
7188 reg_state[to->value()] = reg_written;
7189 return true;
7190 }
7191
7192 // Calculate the extra stack space required for packing or unpacking inline
7193 // args and adjust the stack pointer
7194 int MacroAssembler::extend_stack_for_inline_args(int args_on_stack) {
7195 int sp_inc = args_on_stack * VMRegImpl::stack_slot_size;
7196 sp_inc = align_up(sp_inc, StackAlignmentInBytes);
7197 assert(sp_inc > 0, "sanity");
7198
7199 // Save a copy of the FP and LR here for deoptimization patching and frame walking
7200 stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
7201
7202 // Adjust the stack pointer. This will be repaired on return by MacroAssembler::remove_frame
7203 if (sp_inc < (1 << 9)) {
7204 sub(sp, sp, sp_inc); // Fits in an immediate
7205 } else {
7206 mov(rscratch1, sp_inc);
7207 sub(sp, sp, rscratch1);
7208 }
7209
7210 return sp_inc + 2 * wordSize; // Account for the FP/LR space
7211 }
7212
7213 // Read all fields from an inline type oop and store the values in registers/stack slots
7214 bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index,
7215 VMReg from, int& from_index, VMRegPair* to, int to_count, int& to_index,
7216 RegState reg_state[]) {
7217 assert(sig->at(sig_index)._bt == T_VOID, "should be at end delimiter");
7218 assert(from->is_valid(), "source must be valid");
7219 bool progress = false;
7220 #ifdef ASSERT
7221 const int start_offset = offset();
7222 #endif
7223
7224 Label L_null, L_notNull;
7225 // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
7226 Register tmp1 = r10;
7227 Register tmp2 = r11;
7228 Register fromReg = noreg;
7229 ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
7230 bool done = true;
7231 bool mark_done = true;
7232 VMReg toReg;
7233 BasicType bt;
7234 // Check if argument requires a null check
7235 bool null_check = false;
7236 VMReg nullCheckReg;
7237 while (stream.next(nullCheckReg, bt)) {
7238 if (sig->at(stream.sig_index())._offset == -1) {
7239 null_check = true;
7240 break;
7241 }
7242 }
7243 stream.reset(sig_index, to_index);
7244 while (stream.next(toReg, bt)) {
7245 assert(toReg->is_valid(), "destination must be valid");
7246 int idx = (int)toReg->value();
7247 if (reg_state[idx] == reg_readonly) {
7248 if (idx != from->value()) {
7249 mark_done = false;
7250 }
7251 done = false;
7252 continue;
7253 } else if (reg_state[idx] == reg_written) {
7254 continue;
7255 }
7256 assert(reg_state[idx] == reg_writable, "must be writable");
7257 reg_state[idx] = reg_written;
7258 progress = true;
7259
7260 if (fromReg == noreg) {
7261 if (from->is_reg()) {
7262 fromReg = from->as_Register();
7263 } else {
7264 int st_off = from->reg2stack() * VMRegImpl::stack_slot_size;
7265 ldr(tmp1, Address(sp, st_off));
7266 fromReg = tmp1;
7267 }
7268 if (null_check) {
7269 // Nullable inline type argument, emit null check
7270 cbz(fromReg, L_null);
7271 }
7272 }
7273 int off = sig->at(stream.sig_index())._offset;
7274 if (off == -1) {
7275 assert(null_check, "Missing null check at");
7276 if (toReg->is_stack()) {
7277 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7278 mov(tmp2, 1);
7279 str(tmp2, Address(sp, st_off));
7280 } else {
7281 mov(toReg->as_Register(), 1);
7282 }
7283 continue;
7284 }
7285 assert(off > 0, "offset in object should be positive");
7286 Address fromAddr = Address(fromReg, off);
7287 if (!toReg->is_FloatRegister()) {
7288 Register dst = toReg->is_stack() ? tmp2 : toReg->as_Register();
7289 if (is_reference_type(bt)) {
7290 load_heap_oop(dst, fromAddr, rscratch1, rscratch2);
7291 } else {
7292 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
7293 load_sized_value(dst, fromAddr, type2aelembytes(bt), is_signed);
7294 }
7295 if (toReg->is_stack()) {
7296 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7297 str(dst, Address(sp, st_off));
7298 }
7299 } else if (bt == T_DOUBLE) {
7300 ldrd(toReg->as_FloatRegister(), fromAddr);
7301 } else {
7302 assert(bt == T_FLOAT, "must be float");
7303 ldrs(toReg->as_FloatRegister(), fromAddr);
7304 }
7305 }
7306 if (progress && null_check) {
7307 if (done) {
7308 b(L_notNull);
7309 bind(L_null);
7310 // Set IsInit field to zero to signal that the argument is null.
7311 // Also set all oop fields to zero to make the GC happy.
7312 stream.reset(sig_index, to_index);
7313 while (stream.next(toReg, bt)) {
7314 if (sig->at(stream.sig_index())._offset == -1 ||
7315 bt == T_OBJECT || bt == T_ARRAY) {
7316 if (toReg->is_stack()) {
7317 int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7318 str(zr, Address(sp, st_off));
7319 } else {
7320 mov(toReg->as_Register(), zr);
7321 }
7322 }
7323 }
7324 bind(L_notNull);
7325 } else {
7326 bind(L_null);
7327 }
7328 }
7329
7330 sig_index = stream.sig_index();
7331 to_index = stream.regs_index();
7332
7333 if (mark_done && reg_state[from->value()] != reg_written) {
7334 // This is okay because no one else will write to that slot
7335 reg_state[from->value()] = reg_writable;
7336 }
7337 from_index--;
7338 assert(progress || (start_offset == offset()), "should not emit code");
7339 return done;
7340 }
7341
7342 // Pack fields back into an inline type oop
7343 bool MacroAssembler::pack_inline_helper(const GrowableArray<SigEntry>* sig, int& sig_index, int vtarg_index,
7344 VMRegPair* from, int from_count, int& from_index, VMReg to,
7345 RegState reg_state[], Register val_array) {
7346 assert(sig->at(sig_index)._bt == T_METADATA, "should be at delimiter");
7347 assert(to->is_valid(), "destination must be valid");
7348
7349 if (reg_state[to->value()] == reg_written) {
7350 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7351 return true; // Already written
7352 }
7353
7354 // The GC barrier expanded by store_heap_oop below may call into the
7355 // runtime so use callee-saved registers for any values that need to be
7356 // preserved. The GC barrier assembler should take care of saving the
7357 // Java argument registers.
7358 // TODO 8284443 Isn't it an issue if below code uses r14 as tmp when it contains a spilled value?
7359 // Be careful with r14 because it's used for spilling (see MacroAssembler::spill_reg_for).
7360 Register val_obj_tmp = r21;
7361 Register from_reg_tmp = r22;
7362 Register tmp1 = r14;
7363 Register tmp2 = r13;
7364 Register tmp3 = r12;
7365 Register val_obj = to->is_stack() ? val_obj_tmp : to->as_Register();
7366
7367 assert_different_registers(val_obj_tmp, from_reg_tmp, tmp1, tmp2, tmp3, val_array);
7368
7369 if (reg_state[to->value()] == reg_readonly) {
7370 if (!is_reg_in_unpacked_fields(sig, sig_index, to, from, from_count, from_index)) {
7371 skip_unpacked_fields(sig, sig_index, from, from_count, from_index);
7372 return false; // Not yet writable
7373 }
7374 val_obj = val_obj_tmp;
7375 }
7376
7377 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + vtarg_index * type2aelembytes(T_OBJECT);
7378 load_heap_oop(val_obj, Address(val_array, index), tmp1, tmp2);
7379
7380 ScalarizedInlineArgsStream stream(sig, sig_index, from, from_count, from_index);
7381 VMReg fromReg;
7382 BasicType bt;
7383 Label L_null;
7384 while (stream.next(fromReg, bt)) {
7385 assert(fromReg->is_valid(), "source must be valid");
7386 reg_state[fromReg->value()] = reg_writable;
7387
7388 int off = sig->at(stream.sig_index())._offset;
7389 if (off == -1) {
7390 // Nullable inline type argument, emit null check
7391 Label L_notNull;
7392 if (fromReg->is_stack()) {
7393 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7394 ldrb(tmp2, Address(sp, ld_off));
7395 cbnz(tmp2, L_notNull);
7396 } else {
7397 cbnz(fromReg->as_Register(), L_notNull);
7398 }
7399 mov(val_obj, 0);
7400 b(L_null);
7401 bind(L_notNull);
7402 continue;
7403 }
7404
7405 assert(off > 0, "offset in object should be positive");
7406 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
7407
7408 // Pack the scalarized field into the value object.
7409 Address dst(val_obj, off);
7410
7411 if (!fromReg->is_FloatRegister()) {
7412 Register src;
7413 if (fromReg->is_stack()) {
7414 src = from_reg_tmp;
7415 int ld_off = fromReg->reg2stack() * VMRegImpl::stack_slot_size;
7416 load_sized_value(src, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
7417 } else {
7418 src = fromReg->as_Register();
7419 }
7420 assert_different_registers(dst.base(), src, tmp1, tmp2, tmp3, val_array);
7421 if (is_reference_type(bt)) {
7422 store_heap_oop(dst, src, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
7423 } else {
7424 store_sized_value(dst, src, size_in_bytes);
7425 }
7426 } else if (bt == T_DOUBLE) {
7427 strd(fromReg->as_FloatRegister(), dst);
7428 } else {
7429 assert(bt == T_FLOAT, "must be float");
7430 strs(fromReg->as_FloatRegister(), dst);
7431 }
7432 }
7433 bind(L_null);
7434 sig_index = stream.sig_index();
7435 from_index = stream.regs_index();
7436
7437 assert(reg_state[to->value()] == reg_writable, "must have already been read");
7438 bool success = move_helper(val_obj->as_VMReg(), to, T_OBJECT, reg_state);
7439 assert(success, "to register must be writeable");
7440
7441 return true;
7442 }
7443
7444 VMReg MacroAssembler::spill_reg_for(VMReg reg) {
7445 return (reg->is_FloatRegister()) ? v8->as_VMReg() : r14->as_VMReg();
7446 }
7447
7448 void MacroAssembler::cache_wb(Address line) {
7449 assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
7450 assert(line.index() == noreg, "index should be noreg");
7451 assert(line.offset() == 0, "offset should be 0");
7452 // would like to assert this
7453 // assert(line._ext.shift == 0, "shift should be zero");
7454 if (VM_Version::supports_dcpop()) {
7455 // writeback using clear virtual address to point of persistence
7456 dc(Assembler::CVAP, line.base());
7457 } else {
7458 // no need to generate anything as Unsafe.writebackMemory should
7459 // never invoke this stub
7460 }
7461 }
7462
7463 void MacroAssembler::cache_wbsync(bool is_pre) {
7464 // we only need a barrier post sync
7465 if (!is_pre) {
7466 membar(Assembler::AnyAny);
7467 }
7826 }
7827
7828 // Check if the lock-stack is full.
7829 ldrw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7830 cmpw(top, (unsigned)LockStack::end_offset());
7831 br(Assembler::GE, slow);
7832
7833 // Check for recursion.
7834 subw(t, top, oopSize);
7835 ldr(t, Address(rthread, t));
7836 cmp(obj, t);
7837 br(Assembler::EQ, push);
7838
7839 // Check header for monitor (0b10).
7840 tst(mark, markWord::monitor_value);
7841 br(Assembler::NE, slow);
7842
7843 // Try to lock. Transition lock bits 0b01 => 0b00
7844 assert(oopDesc::mark_offset_in_bytes() == 0, "required to avoid lea");
7845 orr(mark, mark, markWord::unlocked_value);
7846 if (EnableValhalla) {
7847 // Mask inline_type bit such that we go to the slow path if object is an inline type
7848 andr(mark, mark, ~((int) markWord::inline_type_bit_in_place));
7849 }
7850 eor(t, mark, markWord::unlocked_value);
7851 cmpxchg(/*addr*/ obj, /*expected*/ mark, /*new*/ t, Assembler::xword,
7852 /*acquire*/ true, /*release*/ false, /*weak*/ false, noreg);
7853 br(Assembler::NE, slow);
7854
7855 bind(push);
7856 // After successful lock, push object on lock-stack.
7857 str(obj, Address(rthread, top));
7858 addw(top, top, oopSize);
7859 strw(top, Address(rthread, JavaThread::lock_stack_top_offset()));
7860 }
7861
7862 // Implements lightweight-unlocking.
7863 //
7864 // - obj: the object to be unlocked
7865 // - t1, t2, t3: temporary registers
7866 // - slow: branched to if unlocking fails, absolute offset may larger than 32KB (imm14 encoding).
7867 void MacroAssembler::lightweight_unlock(Register obj, Register t1, Register t2, Register t3, Label& slow) {
7868 assert(LockingMode == LM_LIGHTWEIGHT, "only used with new lightweight locking");
7869 // cmpxchg clobbers rscratch1.
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