1 /*
2 * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_OPTO_MACHNODE_HPP
26 #define SHARE_OPTO_MACHNODE_HPP
27
28 #include "opto/c2_MacroAssembler.hpp"
29 #include "opto/callnode.hpp"
30 #include "opto/constantTable.hpp"
31 #include "opto/matcher.hpp"
32 #include "opto/multnode.hpp"
33 #include "opto/node.hpp"
34 #include "opto/regmask.hpp"
35 #include "utilities/growableArray.hpp"
36
37 class BufferBlob;
38 class JVMState;
39 class MachCallDynamicJavaNode;
40 class MachCallJavaNode;
41 class MachCallLeafNode;
42 class MachCallNode;
43 class MachCallRuntimeNode;
44 class MachCallStaticJavaNode;
45 class MachEpilogNode;
46 class MachIfNode;
47 class MachNullCheckNode;
48 class MachOper;
49 class MachProjNode;
50 class MachPrologNode;
51 class MachReturnNode;
52 class MachSafePointNode;
53 class MachSpillCopyNode;
54 class Matcher;
55 class PhaseRegAlloc;
56 class RegMask;
57 class State;
58
59 //---------------------------MachOper------------------------------------------
60 class MachOper : public ResourceObj {
61 public:
62 // Allocate right next to the MachNodes in the same arena
63 void *operator new(size_t x) throw() {
64 Compile* C = Compile::current();
65 return C->node_arena()->AmallocWords(x);
66 }
67
68 // Opcode
69 virtual uint opcode() const = 0;
70
71 // Number of input edges.
72 // Generally at least 1
73 virtual uint num_edges() const { return 1; }
74 // Array of Register masks
75 virtual const RegMask *in_RegMask(int index) const;
76
77 // Methods to output the encoding of the operand
78
79 // Negate conditional branches. Error for non-branch Nodes
80 virtual void negate();
81
82 // Return the value requested
83 // result register lookup, corresponding to int_format
84 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
85 // input register lookup, corresponding to ext_format
86 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
87
88 // helpers for MacroAssembler generation from ADLC
89 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
90 return ::as_Register(reg(ra_, node));
91 }
92 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
93 return ::as_Register(reg(ra_, node, idx));
94 }
95 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
96 return ::as_FloatRegister(reg(ra_, node));
97 }
98 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
99 return ::as_FloatRegister(reg(ra_, node, idx));
100 }
101
102 #if defined(IA32) || defined(AMD64)
103 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node) const {
104 return ::as_KRegister(reg(ra_, node));
105 }
106 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
107 return ::as_KRegister(reg(ra_, node, idx));
108 }
109 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
110 return ::as_XMMRegister(reg(ra_, node));
111 }
112 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
113 return ::as_XMMRegister(reg(ra_, node, idx));
114 }
115 #endif
116 // CondRegister reg converter
117 #if defined(PPC64)
118 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
119 return ::as_ConditionRegister(reg(ra_, node));
120 }
121 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
122 return ::as_ConditionRegister(reg(ra_, node, idx));
123 }
124 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
125 return ::as_VectorRegister(reg(ra_, node));
126 }
127 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
128 return ::as_VectorRegister(reg(ra_, node, idx));
129 }
130 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
131 return ::as_VectorSRegister(reg(ra_, node));
132 }
133 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
134 return ::as_VectorSRegister(reg(ra_, node, idx));
135 }
136 #endif
137 #if defined(S390)
138 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
139 return ::as_VectorRegister(reg(ra_, node));
140 }
141 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
142 return ::as_VectorRegister(reg(ra_, node, idx));
143 }
144 #endif
145 #if defined(AARCH64)
146 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node) const {
147 return ::as_PRegister(reg(ra_, node));
148 }
149 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node, int idx) const {
150 return ::as_PRegister(reg(ra_, node, idx));
151 }
152 #endif
153
154 virtual intptr_t constant() const;
155 virtual relocInfo::relocType constant_reloc() const;
156 virtual jdouble constantD() const;
157 virtual jfloat constantF() const;
158 virtual jlong constantL() const;
159 virtual jshort constantH() const;
160 virtual TypeOopPtr *oop() const;
161 virtual int ccode() const;
162 // A zero, default, indicates this value is not needed.
163 // May need to lookup the base register, as done in int_ and ext_format
164 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
165 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
166 virtual int scale() const;
167 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
168 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
169 // Check for PC-Relative displacement
170 virtual relocInfo::relocType disp_reloc() const;
171 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
172 virtual int base_position() const; // base edge position, or -1
173 virtual int index_position() const; // index edge position, or -1
174
175 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
176 // Only returns non-null value for x86_32.ad's indOffset32X
177 virtual const TypePtr *disp_as_type() const { return nullptr; }
178
179 // Return the label
180 virtual Label *label() const;
181
182 // Return the method's address
183 virtual intptr_t method() const;
184
185 // Hash and compare over operands are currently identical
186 virtual uint hash() const;
187 virtual bool cmp( const MachOper &oper ) const;
188
189 // Virtual clone, since I do not know how big the MachOper is.
190 virtual MachOper *clone() const = 0;
191
192 // Return ideal Type from simple operands. Fail for complex operands.
193 virtual const Type *type() const;
194
195 // Set an integer offset if we have one, or error otherwise
196 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
197
198 #ifndef PRODUCT
199 // Return name of operand
200 virtual const char *Name() const { return "???";}
201
202 // Methods to output the text version of the operand
203 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
204 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
205
206 virtual void dump_spec(outputStream *st) const; // Print per-operand info
207
208 // Check whether o is a valid oper.
209 static bool notAnOper(const MachOper *o) {
210 if (o == nullptr) return true;
211 if (((intptr_t)o & 1) != 0) return true;
212 if (*(address*)o == badAddress) return true; // kill by Node::destruct
213 return false;
214 }
215 #endif // !PRODUCT
216 };
217
218 //------------------------------MachNode---------------------------------------
219 // Base type for all machine specific nodes. All node classes generated by the
220 // ADLC inherit from this class.
221 class MachNode : public Node {
222 public:
223 MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(nullptr) {
224 init_class_id(Class_Mach);
225 }
226 // Required boilerplate
227 virtual uint size_of() const { return sizeof(MachNode); }
228 virtual int Opcode() const; // Always equal to MachNode
229 virtual uint rule() const = 0; // Machine-specific opcode
230 // Number of inputs which come before the first operand.
231 // Generally at least 1, to skip the Control input
232 virtual uint oper_input_base() const { return 1; }
233 // Position of constant base node in node's inputs. -1 if
234 // no constant base node input.
235 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
236
237 uint8_t barrier_data() const { return _barrier; }
238 void set_barrier_data(uint8_t data) { _barrier = data; }
239
240 // Copy index, inputs, and operands to a new version of the instruction.
241 // Called from cisc_version() and short_branch_version().
242 void fill_new_machnode(MachNode *n) const;
243
244 // Return an equivalent instruction using memory for cisc_operand position
245 virtual MachNode *cisc_version(int offset);
246 // Modify this instruction's register mask to use stack version for cisc_operand
247 virtual void use_cisc_RegMask();
248
249 // Support for short branches
250 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
251
252 // Avoid back to back some instructions on some CPUs.
253 enum AvoidBackToBackFlag { AVOID_NONE = 0,
254 AVOID_BEFORE = Flag_avoid_back_to_back_before,
255 AVOID_AFTER = Flag_avoid_back_to_back_after,
256 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
257
258 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
259 return (flags() & flag_value) == flag_value;
260 }
261
262 // instruction implemented with a call
263 bool has_call() const { return (flags() & Flag_has_call) != 0; }
264
265 // First index in _in[] corresponding to operand, or -1 if there is none
266 int operand_index(uint operand) const;
267 int operand_index(const MachOper *oper) const;
268 int operand_index(Node* m) const;
269
270 // Register class input is expected in
271 virtual const RegMask &in_RegMask(uint) const;
272
273 // cisc-spillable instructions redefine for use by in_RegMask
274 virtual const RegMask *cisc_RegMask() const { return nullptr; }
275
276 // If this instruction is a 2-address instruction, then return the
277 // index of the input which must match the output. Not necessary
278 // for instructions which bind the input and output register to the
279 // same singleton register (e.g., Intel IDIV which binds AX to be
280 // both an input and an output). It is necessary when the input and
281 // output have choices - but they must use the same choice.
282 virtual uint two_adr( ) const { return 0; }
283
284 // The GC might require some barrier metadata for machine code emission.
285 uint8_t _barrier;
286
287 // Array of complex operand pointers. Each corresponds to zero or
288 // more leafs. Must be set by MachNode constructor to point to an
289 // internal array of MachOpers. The MachOper array is sized by
290 // specific MachNodes described in the ADL.
291 uint16_t _num_opnds;
292 MachOper **_opnds;
293 uint16_t num_opnds() const { return _num_opnds; }
294
295 // Emit bytes using C2_MacroAssembler
296 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
297 // Expand node after register allocation.
298 // Node is replaced by several nodes in the postalloc expand phase.
299 // Corresponding methods are generated for nodes if they specify
300 // postalloc_expand. See block.cpp for more documentation.
301 virtual bool requires_postalloc_expand() const { return false; }
302 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
303 // Size of instruction in bytes
304 virtual uint size(PhaseRegAlloc *ra_) const;
305 // Helper function that computes size by emitting code
306 virtual uint emit_size(PhaseRegAlloc *ra_) const;
307
308 // Return the alignment required (in units of relocInfo::addr_unit())
309 // for this instruction (must be a power of 2)
310 int pd_alignment_required() const;
311 virtual int alignment_required() const { return pd_alignment_required(); }
312
313 // Return the padding (in bytes) to be emitted before this
314 // instruction to properly align it.
315 virtual int compute_padding(int current_offset) const;
316
317 // Return number of relocatable values contained in this instruction
318 virtual int reloc() const { return 0; }
319
320 // Return number of words used for double constants in this instruction
321 virtual int ins_num_consts() const { return 0; }
322
323 // Hash and compare over operands. Used to do GVN on machine Nodes.
324 virtual uint hash() const;
325 virtual bool cmp( const Node &n ) const;
326
327 // Expand method for MachNode, replaces nodes representing pseudo
328 // instructions with a set of nodes which represent real machine
329 // instructions and compute the same value.
330 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
331
332 // Bottom_type call; value comes from operand0
333 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
334 virtual uint ideal_reg() const {
335 const Type *t = _opnds[0]->type();
336 if (t == TypeInt::CC) {
337 return Op_RegFlags;
338 } else {
339 return t->ideal_reg();
340 }
341 }
342
343 // If this is a memory op, return the base pointer and fixed offset.
344 // If there are no such, return null. If there are multiple addresses
345 // or the address is indeterminate (rare cases) then return (Node*)-1,
346 // which serves as node bottom.
347 // If the offset is not statically determined, set it to Type::OffsetBot.
348 // This method is free to ignore stack slots if that helps.
349 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
350 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
351 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
352
353 // Helper for get_base_and_disp: find the base and index input nodes.
354 // Returns the MachOper as determined by memory_operand(), for use, if
355 // needed by the caller. If (MachOper *)-1 is returned, base and index
356 // are set to NodeSentinel. If null is returned, base and
357 // index are set to null.
358 const MachOper* memory_inputs(Node* &base, Node* &index) const;
359
360 // Helper for memory_inputs: Which operand carries the necessary info?
361 // By default, returns null, which means there is no such operand.
362 // If it returns (MachOper*)-1, this means there are multiple memories.
363 virtual const MachOper* memory_operand() const { return nullptr; }
364
365 // Call "get_base_and_disp" to decide which category of memory is used here.
366 virtual const class TypePtr *adr_type() const;
367
368 // Apply peephole rule(s) to this instruction
369 virtual int peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_);
370
371 // Top-level ideal Opcode matched
372 virtual int ideal_Opcode() const { return Op_Node; }
373
374 // Adds the label for the case
375 virtual void add_case_label( int switch_val, Label* blockLabel);
376
377 // Set the absolute address for methods
378 virtual void method_set( intptr_t addr );
379
380 // Should we clone rather than spill this instruction?
381 bool rematerialize() const;
382
383 // Get the pipeline info
384 static const Pipeline *pipeline_class();
385 virtual const Pipeline *pipeline() const;
386
387 // Returns true if this node is a check that can be implemented with a trap.
388 virtual bool is_TrapBasedCheckNode() const { return false; }
389 void set_removed() { add_flag(Flag_is_removed_by_peephole); }
390 bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; }
391
392 #ifndef PRODUCT
393 virtual const char *Name() const = 0; // Machine-specific name
394 virtual void dump_spec(outputStream *st) const; // Print per-node info
395 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
396 #endif
397 };
398
399 //------------------------------MachIdealNode----------------------------
400 // Machine specific versions of nodes that must be defined by user.
401 // These are not converted by matcher from ideal nodes to machine nodes
402 // but are inserted into the code by the compiler.
403 class MachIdealNode : public MachNode {
404 public:
405 MachIdealNode( ) {}
406
407 // Define the following defaults for non-matched machine nodes
408 virtual uint oper_input_base() const { return 0; }
409 virtual uint rule() const { return 9999999; }
410 virtual const class Type *bottom_type() const { return _opnds == nullptr ? Type::CONTROL : MachNode::bottom_type(); }
411 };
412
413 //------------------------------MachTypeNode----------------------------
414 // Machine Nodes that need to retain a known Type.
415 class MachTypeNode : public MachNode {
416 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
417 public:
418 MachTypeNode( ) {}
419 const Type *_bottom_type;
420
421 virtual const class Type *bottom_type() const { return _bottom_type; }
422 #ifndef PRODUCT
423 virtual void dump_spec(outputStream *st) const;
424 #endif
425 };
426
427 //------------------------------MachBreakpointNode----------------------------
428 // Machine breakpoint or interrupt Node
429 class MachBreakpointNode : public MachIdealNode {
430 public:
431 MachBreakpointNode( ) {}
432 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
433 virtual uint size(PhaseRegAlloc *ra_) const;
434
435 #ifndef PRODUCT
436 virtual const char *Name() const { return "Breakpoint"; }
437 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
438 #endif
439 };
440
441 //------------------------------MachConstantBaseNode--------------------------
442 // Machine node that represents the base address of the constant table.
443 class MachConstantBaseNode : public MachIdealNode {
444 public:
445 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
446
447 public:
448 MachConstantBaseNode() : MachIdealNode() {
449 init_class_id(Class_MachConstantBase);
450 }
451 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
452 virtual uint ideal_reg() const { return Op_RegP; }
453 virtual uint oper_input_base() const { return 1; }
454
455 virtual bool requires_postalloc_expand() const;
456 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
457
458 virtual void emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const;
459 virtual uint size(PhaseRegAlloc* ra_) const;
460
461 static const RegMask& static_out_RegMask() { return _out_RegMask; }
462 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
463
464 #ifndef PRODUCT
465 virtual const char* Name() const { return "MachConstantBaseNode"; }
466 virtual void format(PhaseRegAlloc*, outputStream* st) const;
467 #endif
468 };
469
470 //------------------------------MachConstantNode-------------------------------
471 // Machine node that holds a constant which is stored in the constant table.
472 class MachConstantNode : public MachTypeNode {
473 protected:
474 ConstantTable::Constant _constant; // This node's constant.
475
476 public:
477 MachConstantNode() : MachTypeNode() {
478 init_class_id(Class_MachConstant);
479 }
480
481 virtual void eval_constant(Compile* C) {
482 #ifdef ASSERT
483 tty->print("missing MachConstantNode eval_constant function: ");
484 dump();
485 #endif
486 ShouldNotCallThis();
487 }
488
489 virtual const RegMask &in_RegMask(uint idx) const {
490 if (idx == mach_constant_base_node_input())
491 return MachConstantBaseNode::static_out_RegMask();
492 return MachNode::in_RegMask(idx);
493 }
494
495 // Input edge of MachConstantBaseNode.
496 virtual uint mach_constant_base_node_input() const { return req() - 1; }
497
498 int constant_offset();
499 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
500 // Unchecked version to avoid assertions in debug output.
501 int constant_offset_unchecked() const;
502 };
503
504 //------------------------------MachUEPNode-----------------------------------
505 // Machine Unvalidated Entry Point Node
506 class MachUEPNode : public MachIdealNode {
507 public:
508 MachUEPNode( ) {}
509 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
510 virtual uint size(PhaseRegAlloc *ra_) const;
511
512 #ifndef PRODUCT
513 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
514 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
515 #endif
516 };
517
518 //------------------------------MachPrologNode--------------------------------
519 // Machine function Prolog Node
520 class MachPrologNode : public MachIdealNode {
521 public:
522 MachPrologNode( ) {}
523 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
524 virtual uint size(PhaseRegAlloc *ra_) const;
525 virtual int reloc() const;
526
527 #ifndef PRODUCT
528 virtual const char *Name() const { return "Prolog"; }
529 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
530 #endif
531 };
532
533 //------------------------------MachEpilogNode--------------------------------
534 // Machine function Epilog Node
535 class MachEpilogNode : public MachIdealNode {
536 public:
537 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
538 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
539 virtual uint size(PhaseRegAlloc *ra_) const;
540 virtual int reloc() const;
541 virtual const Pipeline *pipeline() const;
542
543 private:
544 bool _do_polling;
545
546 public:
547 bool do_polling() const { return _do_polling; }
548
549 #ifndef PRODUCT
550 virtual const char *Name() const { return "Epilog"; }
551 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
552 #endif
553 };
554
555 //------------------------------MachNopNode-----------------------------------
556 // Machine function Nop Node
557 class MachNopNode : public MachIdealNode {
558 private:
559 int _count;
560 public:
561 MachNopNode( ) : _count(1) {}
562 MachNopNode( int count ) : _count(count) {}
563 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
564 virtual uint size(PhaseRegAlloc *ra_) const;
565
566 virtual const class Type *bottom_type() const { return Type::CONTROL; }
567
568 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
569 virtual const Pipeline *pipeline() const;
570 #ifndef PRODUCT
571 virtual const char *Name() const { return "Nop"; }
572 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
573 virtual void dump_spec(outputStream *st) const { } // No per-operand info
574 #endif
575 };
576
577 //------------------------------MachSpillCopyNode------------------------------
578 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
579 // location (stack or register).
580 class MachSpillCopyNode : public MachIdealNode {
581 public:
582 enum SpillType {
583 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails
584 PhiInput, // Inserted when coalescing of a phi node and its input fails
585 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks
586 LoopPhiInput, // Pre-split compares of loop-phis
587 Definition, // An lrg marked as spilled will be spilled to memory right after its definition,
588 // if in high pressure region or the lrg is bound
589 RegToReg, // A register to register move
590 RegToMem, // A register to memory move
591 MemToReg, // A memory to register move
592 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
593 // the phi and its input resides at different locations (i.e. reg or mem)
594 BasePointerToMem, // Spill base pointer to memory at safepoint
595 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be
596 // stretched beyond a new definition point, therefore we split out new copies instead
597 CallUse, // Spill use at a call
598 Bound // An lrg marked as spill that is bound and needs to be spilled at a use
599 };
600 private:
601 const RegMask *_in; // RegMask for input
602 const RegMask *_out; // RegMask for output
603 const Type *_type;
604 const SpillType _spill_type;
605 public:
606 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
607 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
608 init_class_id(Class_MachSpillCopy);
609 init_flags(Flag_is_Copy);
610 add_req(nullptr);
611 add_req(n);
612 }
613 virtual uint size_of() const { return sizeof(*this); }
614 void set_out_RegMask(const RegMask &out) { _out = &out; }
615 void set_in_RegMask(const RegMask &in) { _in = ∈ }
616 virtual const RegMask &out_RegMask() const { return *_out; }
617 virtual const RegMask &in_RegMask(uint) const { return *_in; }
618 virtual const class Type *bottom_type() const { return _type; }
619 virtual uint ideal_reg() const { return _type->ideal_reg(); }
620 virtual uint oper_input_base() const { return 1; }
621 uint implementation( C2_MacroAssembler *masm, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
622
623 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
624 virtual uint size(PhaseRegAlloc *ra_) const;
625
626
627 #ifndef PRODUCT
628 static const char *spill_type(SpillType st) {
629 switch (st) {
630 case TwoAddress:
631 return "TwoAddressSpillCopy";
632 case PhiInput:
633 return "PhiInputSpillCopy";
634 case DebugUse:
635 return "DebugUseSpillCopy";
636 case LoopPhiInput:
637 return "LoopPhiInputSpillCopy";
638 case Definition:
639 return "DefinitionSpillCopy";
640 case RegToReg:
641 return "RegToRegSpillCopy";
642 case RegToMem:
643 return "RegToMemSpillCopy";
644 case MemToReg:
645 return "MemToRegSpillCopy";
646 case PhiLocationDifferToInputLocation:
647 return "PhiLocationDifferToInputLocationSpillCopy";
648 case BasePointerToMem:
649 return "BasePointerToMemSpillCopy";
650 case InputToRematerialization:
651 return "InputToRematerializationSpillCopy";
652 case CallUse:
653 return "CallUseSpillCopy";
654 case Bound:
655 return "BoundSpillCopy";
656 default:
657 assert(false, "Must have valid spill type");
658 return "MachSpillCopy";
659 }
660 }
661
662 virtual const char *Name() const {
663 return spill_type(_spill_type);
664 }
665
666 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
667 #endif
668 };
669
670 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
671 // however it doesn't have a control input and is more like a MergeMem.
672 // It is inserted after the register allocation is done to ensure that nodes use single
673 // definition of a multidef lrg in a block.
674 class MachMergeNode : public MachIdealNode {
675 public:
676 MachMergeNode(Node *n1) {
677 init_class_id(Class_MachMerge);
678 add_req(nullptr);
679 add_req(n1);
680 }
681 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
682 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
683 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
684 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
685 virtual uint oper_input_base() const { return 1; }
686 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const { }
687 virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
688 #ifndef PRODUCT
689 virtual const char *Name() const { return "MachMerge"; }
690 #endif
691 };
692
693 //------------------------------MachBranchNode--------------------------------
694 // Abstract machine branch Node
695 class MachBranchNode : public MachIdealNode {
696 public:
697 MachBranchNode() : MachIdealNode() {
698 init_class_id(Class_MachBranch);
699 }
700 virtual void label_set(Label* label, uint block_num) = 0;
701 virtual void save_label(Label** label, uint* block_num) = 0;
702
703 // Support for short branches
704 virtual MachNode *short_branch_version() { return nullptr; }
705
706 virtual bool pinned() const { return true; };
707 };
708
709 //------------------------------MachNullChkNode--------------------------------
710 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
711 // also some kind of memory op. Turns the indicated MachNode into a
712 // conditional branch with good latency on the ptr-not-null path and awful
713 // latency on the pointer-is-null path.
714
715 class MachNullCheckNode : public MachBranchNode {
716 public:
717 const uint _vidx; // Index of memop being tested
718 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
719 init_class_id(Class_MachNullCheck);
720 add_req(ctrl);
721 add_req(memop);
722 }
723 virtual int Opcode() const;
724 virtual uint size_of() const { return sizeof(*this); }
725
726 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
727 virtual void label_set(Label* label, uint block_num);
728 virtual void save_label(Label** label, uint* block_num);
729 virtual void negate() { }
730 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
731 virtual uint ideal_reg() const { return NotAMachineReg; }
732 virtual const RegMask &in_RegMask(uint) const;
733 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
734 #ifndef PRODUCT
735 virtual const char *Name() const { return "NullCheck"; }
736 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
737 #endif
738 };
739
740 //------------------------------MachProjNode----------------------------------
741 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
742 // just MachNodes made by the Ideal world that replicate simple projections
743 // but with machine-dependent input & output register masks. Generally
744 // produced as part of calling conventions. Normally I make MachNodes as part
745 // of the Matcher process, but the Matcher is ill suited to issues involving
746 // frame handling, so frame handling is all done in the Ideal world with
747 // occasional callbacks to the machine model for important info.
748 class MachProjNode : public ProjNode {
749 public:
750 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
751 init_class_id(Class_MachProj);
752 }
753 RegMask _rout;
754 const uint _ideal_reg;
755 enum projType {
756 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
757 fat_proj = 999 // Projs killing many regs, defined by _rout
758 };
759 virtual int Opcode() const;
760 virtual const Type *bottom_type() const;
761 virtual const TypePtr *adr_type() const;
762 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
763 virtual const RegMask &out_RegMask() const { return _rout; }
764 virtual uint ideal_reg() const { return _ideal_reg; }
765 // Need size_of() for virtual ProjNode::clone()
766 virtual uint size_of() const { return sizeof(MachProjNode); }
767 #ifndef PRODUCT
768 virtual void dump_spec(outputStream *st) const;
769 #endif
770 };
771
772 //------------------------------MachIfNode-------------------------------------
773 // Machine-specific versions of IfNodes
774 class MachIfNode : public MachBranchNode {
775 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
776 public:
777 float _prob; // Probability branch goes either way
778 float _fcnt; // Frequency counter
779 MachIfNode() : MachBranchNode() {
780 init_class_id(Class_MachIf);
781 }
782 // Negate conditional branches.
783 virtual void negate() = 0;
784 #ifndef PRODUCT
785 virtual void dump_spec(outputStream *st) const;
786 #endif
787 };
788
789 //------------------------------MachJumpNode-----------------------------------
790 // Machine-specific versions of JumpNodes
791 class MachJumpNode : public MachConstantNode {
792 public:
793 float* _probs;
794 MachJumpNode() : MachConstantNode() {
795 init_class_id(Class_MachJump);
796 }
797 };
798
799 //------------------------------MachGotoNode-----------------------------------
800 // Machine-specific versions of GotoNodes
801 class MachGotoNode : public MachBranchNode {
802 public:
803 MachGotoNode() : MachBranchNode() {
804 init_class_id(Class_MachGoto);
805 }
806 };
807
808 //------------------------------MachFastLockNode-------------------------------------
809 // Machine-specific versions of FastLockNodes
810 class MachFastLockNode : public MachNode {
811 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
812 public:
813 MachFastLockNode() : MachNode() {}
814 };
815
816 //------------------------------MachReturnNode--------------------------------
817 // Machine-specific versions of subroutine returns
818 class MachReturnNode : public MachNode {
819 virtual uint size_of() const; // Size is bigger
820 public:
821 RegMask *_in_rms; // Input register masks, set during allocation
822 ReallocMark _nesting; // assertion check for reallocations
823 const TypePtr* _adr_type; // memory effects of call or return
824 MachReturnNode() : MachNode() {
825 init_class_id(Class_MachReturn);
826 _adr_type = TypePtr::BOTTOM; // the default: all of memory
827 }
828
829 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
830
831 virtual const RegMask &in_RegMask(uint) const;
832 virtual bool pinned() const { return true; };
833 virtual const TypePtr *adr_type() const;
834 };
835
836 //------------------------------MachSafePointNode-----------------------------
837 // Machine-specific versions of safepoints
838 class MachSafePointNode : public MachReturnNode {
839 public:
840 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
841 JVMState* _jvms; // Pointer to list of JVM State Objects
842 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
843 bool _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
844 OopMap* oop_map() const { return _oop_map; }
845 void set_oop_map(OopMap* om) { _oop_map = om; }
846
847 MachSafePointNode() : MachReturnNode(), _oop_map(nullptr), _jvms(nullptr), _jvmadj(0), _has_ea_local_in_scope(false) {
848 init_class_id(Class_MachSafePoint);
849 }
850
851 virtual JVMState* jvms() const { return _jvms; }
852 void set_jvms(JVMState* s) {
853 _jvms = s;
854 }
855 virtual const Type *bottom_type() const;
856
857 virtual const RegMask &in_RegMask(uint) const;
858
859 // Functionality from old debug nodes
860 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
861 Node *frameptr () const { return in(TypeFunc::FramePtr); }
862
863 Node *local(const JVMState* jvms, uint idx) const {
864 assert(verify_jvms(jvms), "jvms must match");
865 return in(_jvmadj + jvms->locoff() + idx);
866 }
867 Node *stack(const JVMState* jvms, uint idx) const {
868 assert(verify_jvms(jvms), "jvms must match");
869 return in(_jvmadj + jvms->stkoff() + idx);
870 }
871 Node *monitor_obj(const JVMState* jvms, uint idx) const {
872 assert(verify_jvms(jvms), "jvms must match");
873 return in(_jvmadj + jvms->monitor_obj_offset(idx));
874 }
875 Node *monitor_box(const JVMState* jvms, uint idx) const {
876 assert(verify_jvms(jvms), "jvms must match");
877 return in(_jvmadj + jvms->monitor_box_offset(idx));
878 }
879 Node* scalarized_obj(const JVMState* jvms, uint idx) const {
880 assert(verify_jvms(jvms), "jvms must match");
881 return in(_jvmadj + jvms->scloff() + idx);
882 }
883 void set_local(const JVMState* jvms, uint idx, Node *c) {
884 assert(verify_jvms(jvms), "jvms must match");
885 set_req(_jvmadj + jvms->locoff() + idx, c);
886 }
887 void set_stack(const JVMState* jvms, uint idx, Node *c) {
888 assert(verify_jvms(jvms), "jvms must match");
889 set_req(_jvmadj + jvms->stkoff() + idx, c);
890 }
891 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
892 assert(verify_jvms(jvms), "jvms must match");
893 set_req(_jvmadj + jvms->monoff() + idx, c);
894 }
895 };
896
897 //------------------------------MachCallNode----------------------------------
898 // Machine-specific versions of subroutine calls
899 class MachCallNode : public MachSafePointNode {
900 protected:
901 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
902 virtual bool cmp( const Node &n ) const;
903 virtual uint size_of() const = 0; // Size is bigger
904 public:
905 const TypeFunc *_tf; // Function type
906 address _entry_point; // Address of the method being called
907 float _cnt; // Estimate of number of times called
908 bool _guaranteed_safepoint; // Do we need to observe safepoint?
909
910 const TypeFunc* tf() const { return _tf; }
911 address entry_point() const { return _entry_point; }
912 float cnt() const { return _cnt; }
913
914 void set_tf(const TypeFunc* tf) { _tf = tf; }
915 void set_entry_point(address p) { _entry_point = p; }
916 void set_cnt(float c) { _cnt = c; }
917 void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
918
919 MachCallNode() : MachSafePointNode() {
920 init_class_id(Class_MachCall);
921 }
922
923 virtual const Type *bottom_type() const;
924 virtual bool pinned() const { return false; }
925 virtual const Type* Value(PhaseGVN* phase) const;
926 virtual const RegMask &in_RegMask(uint) const;
927 virtual int ret_addr_offset() { return 0; }
928
929 NOT_LP64(bool return_value_is_used() const;)
930
931 // Similar to cousin class CallNode::returns_pointer
932 bool returns_pointer() const;
933
934 bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
935
936 #ifndef PRODUCT
937 virtual void dump_spec(outputStream *st) const;
938 #endif
939 };
940
941 //------------------------------MachCallJavaNode------------------------------
942 // "Base" class for machine-specific versions of subroutine calls
943 class MachCallJavaNode : public MachCallNode {
944 protected:
945 virtual bool cmp( const Node &n ) const;
946 virtual uint size_of() const; // Size is bigger
947 public:
948 ciMethod* _method; // Method being direct called
949 bool _override_symbolic_info; // Override symbolic call site info from bytecode
950 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
951 bool _method_handle_invoke; // Tells if the call has to preserve SP
952 bool _arg_escape; // ArgEscape in parameter list
953 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
954 init_class_id(Class_MachCallJava);
955 }
956
957 virtual const RegMask &in_RegMask(uint) const;
958
959 int resolved_method_index(C2_MacroAssembler *masm) const {
960 if (_override_symbolic_info) {
961 // Attach corresponding Method* to the call site, so VM can use it during resolution
962 // instead of querying symbolic info from bytecode.
963 assert(_method != nullptr, "method should be set");
964 assert(_method->constant_encoding()->is_method(), "should point to a Method");
965 return masm->code()->oop_recorder()->find_index(_method->constant_encoding());
966 }
967 return 0; // Use symbolic info from bytecode (resolved_method is null).
968 }
969
970 #ifndef PRODUCT
971 virtual void dump_spec(outputStream *st) const;
972 #endif
973 };
974
975 //------------------------------MachCallStaticJavaNode------------------------
976 // Machine-specific versions of monomorphic subroutine calls
977 class MachCallStaticJavaNode : public MachCallJavaNode {
978 virtual bool cmp( const Node &n ) const;
979 virtual uint size_of() const; // Size is bigger
980 public:
981 const char *_name; // Runtime wrapper name
982 MachCallStaticJavaNode() : MachCallJavaNode() {
983 init_class_id(Class_MachCallStaticJava);
984 }
985
986 // If this is an uncommon trap, return the request code, else zero.
987 int uncommon_trap_request() const;
988
989 virtual int ret_addr_offset();
990 #ifndef PRODUCT
991 virtual void dump_spec(outputStream *st) const;
992 void dump_trap_args(outputStream *st) const;
993 #endif
994 };
995
996 //------------------------------MachCallDynamicJavaNode------------------------
997 // Machine-specific versions of possibly megamorphic subroutine calls
998 class MachCallDynamicJavaNode : public MachCallJavaNode {
999 public:
1000 int _vtable_index;
1001 MachCallDynamicJavaNode() : MachCallJavaNode() {
1002 init_class_id(Class_MachCallDynamicJava);
1003 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
1004 }
1005 virtual int ret_addr_offset();
1006 #ifndef PRODUCT
1007 virtual void dump_spec(outputStream *st) const;
1008 #endif
1009 };
1010
1011 //------------------------------MachCallRuntimeNode----------------------------
1012 // Machine-specific versions of subroutine calls
1013 class MachCallRuntimeNode : public MachCallNode {
1014 virtual bool cmp( const Node &n ) const;
1015 virtual uint size_of() const; // Size is bigger
1016 public:
1017 const char *_name; // Printable name, if _method is null
1018 bool _leaf_no_fp; // Is this CallLeafNoFP?
1019 MachCallRuntimeNode() : MachCallNode() {
1020 init_class_id(Class_MachCallRuntime);
1021 }
1022 virtual int ret_addr_offset();
1023 #ifndef PRODUCT
1024 virtual void dump_spec(outputStream *st) const;
1025 #endif
1026 };
1027
1028 class MachCallLeafNode: public MachCallRuntimeNode {
1029 public:
1030 MachCallLeafNode() : MachCallRuntimeNode() {
1031 init_class_id(Class_MachCallLeaf);
1032 }
1033 };
1034
1035 //------------------------------MachHaltNode-----------------------------------
1036 // Machine-specific versions of halt nodes
1037 class MachHaltNode : public MachReturnNode {
1038 public:
1039 bool _reachable;
1040 const char* _halt_reason;
1041 virtual JVMState* jvms() const;
1042 bool is_reachable() const {
1043 return _reachable;
1044 }
1045 };
1046
1047 class MachMemBarNode : public MachNode {
1048 virtual uint size_of() const; // Size is bigger
1049 public:
1050 const TypePtr* _adr_type; // memory effects
1051 MachMemBarNode() : MachNode() {
1052 init_class_id(Class_MachMemBar);
1053 _adr_type = TypePtr::BOTTOM; // the default: all of memory
1054 }
1055
1056 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1057 virtual const TypePtr *adr_type() const;
1058 };
1059
1060
1061 //------------------------------MachTempNode-----------------------------------
1062 // Node used by the adlc to construct inputs to represent temporary registers
1063 class MachTempNode : public MachNode {
1064 private:
1065 MachOper *_opnd_array[1];
1066
1067 public:
1068 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1069 virtual uint rule() const { return 9999999; }
1070 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {}
1071
1072 MachTempNode(MachOper* oper) {
1073 init_class_id(Class_MachTemp);
1074 _num_opnds = 1;
1075 _opnds = _opnd_array;
1076 add_req(nullptr);
1077 _opnds[0] = oper;
1078 }
1079 virtual uint size_of() const { return sizeof(MachTempNode); }
1080
1081 #ifndef PRODUCT
1082 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1083 virtual const char *Name() const { return "MachTemp";}
1084 #endif
1085 };
1086
1087
1088
1089 //------------------------------labelOper--------------------------------------
1090 // Machine-independent version of label operand
1091 class labelOper : public MachOper {
1092 private:
1093 virtual uint num_edges() const { return 0; }
1094 public:
1095 // Supported for fixed size branches
1096 Label* _label; // Label for branch(es)
1097
1098 uint _block_num;
1099
1100 labelOper() : _label(nullptr), _block_num(0) {}
1101
1102 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1103
1104 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1105
1106 virtual MachOper *clone() const;
1107
1108 virtual Label *label() const { assert(_label != nullptr, "need Label"); return _label; }
1109
1110 virtual uint opcode() const;
1111
1112 virtual uint hash() const;
1113 virtual bool cmp( const MachOper &oper ) const;
1114 #ifndef PRODUCT
1115 virtual const char *Name() const { return "Label";}
1116
1117 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1118 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1119 #endif
1120 };
1121
1122
1123 //------------------------------methodOper--------------------------------------
1124 // Machine-independent version of method operand
1125 class methodOper : public MachOper {
1126 private:
1127 virtual uint num_edges() const { return 0; }
1128 public:
1129 intptr_t _method; // Address of method
1130 methodOper() : _method(0) {}
1131 methodOper(intptr_t method) : _method(method) {}
1132
1133 virtual MachOper *clone() const;
1134
1135 virtual intptr_t method() const { return _method; }
1136
1137 virtual uint opcode() const;
1138
1139 virtual uint hash() const;
1140 virtual bool cmp( const MachOper &oper ) const;
1141 #ifndef PRODUCT
1142 virtual const char *Name() const { return "Method";}
1143
1144 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1145 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1146 #endif
1147 };
1148
1149 #endif // SHARE_OPTO_MACHNODE_HPP